Postgraduate Diploma in Runtime Monitoring and Safety Kernels
Online 800-hour Postgraduate Diploma in Runtime Monitoring and Safety Kernels. 8 modules covering ISO 26262:2018, UL 4600 and RTAMT. Assigned tutor and open enrolment.
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Run a real engineering trade-off from this programme. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Understand the role of runtime monitoring.
Specify safety properties using temporal logic.
Design safety kernels and simplex architectures.
Monitor components based on artificial intelligence.
Implement efficient monitors on embedded platforms.
Formally verify the safety kernel.
Use in-service monitoring to maintain the safety case.
Who it's for
- Functional safety engineer who wants to specialise in Runtime Monitoring and Safety Kernels.
- Formal verification engineer who wants to specialise in Runtime Monitoring and Safety Kernels.
- Critical software engineer who wants to specialise in Runtime Monitoring and Safety Kernels.
- Autonomous systems architect who wants to specialise in Runtime Monitoring and Safety Kernels.
- AI safety engineer who wants to specialise in Runtime Monitoring and Safety Kernels.
- Validation engineer who wants to specialise in Runtime Monitoring and Safety Kernels.
- Graduates in engineering or science seeking to enter the automotive sector.
What you'll work with
- ISO 26262:2018
- UL 4600
- ISO 21448:2022 (SOTIF)
- IEEE 2846-2022
- MISRA C:2012
- ISO/PAS 8800:2024
- Implementation Regulation (EU) 2022/1426
- DO-178C
8 modules · 800 h
1.1Limits of prior verification1.2Monitors versus controllers1.3Safety and liveness properties1.4Temporal logics LTL and STL1.5Online and offline monitors1.6Monitor architecture1.7Signal observability1.8Use cases in automated driving1.9Monitorability of properties1.10Case study: monitorable requirements for an ACC
2.1Signal Temporal Logic and robustness2.2Formalised traffic rules2.3Formalisation of RSS2.4Specification patterns2.5RTAMT and Breach tools2.6Component contracts2.7Validation of specifications2.8Traceability to requirements2.9Controlled natural language specifications2.10Laboratory: STL monitor with RTAMT
3.1Safety kernel concept3.2Simplex architecture3.3Advanced controller and safe controller3.4Switching logic3.5Invariant sets and reachability3.6Failures of the primary channel3.7Doer-checker pattern3.8Temporal and spatial isolation3.9Return to the advanced controller3.10Practice: simplex architecture in simulation
4.1Input and OOD monitors4.2Uncertainty monitors4.3Consistency between sensors4.4Planning monitoring4.5Behaviour of the complete system4.6Thresholds and false alarms4.7Monitor evaluation4.8Integration with the ODD4.9Monitors of internal network activations4.10Laboratory: OOD monitor for a detector
5.1Code generated from specifications5.2Monitors on FPGA and microcontroller5.3Real-time requirements5.4Monitors in ROS 25.5Monitors in AUTOSAR5.6Computational cost5.7Logging of violations5.8Testing the monitor itself5.9Distributed monitors and clocks5.10Practice: embedded monitor in C
6.1Formal verification of components6.2Model checking with UPPAAL6.3Theorem proving6.4Static analysis and MISRA C6.5MC/DC coverage6.6Qualified tools6.7Argumentation of independence6.8Criticality separation6.9Abstract interpretation with Polyspace6.10Case study: verification of the switching logic
7.1Fleet monitoring7.2Safety performance indicators7.3Feedback to the safety case7.4UL 4600 and monitoring7.5Incident management7.6Updating monitors7.7Event data recording7.8Regulatory requirements for in-service monitoring7.9Trend analysis of violations7.10Workshop: defining SPIs for a robotaxi
8.1Target system and risks8.2Specification of properties8.3Proposed monitor8.4Proposed safety kernel8.5Implementation8.6Verification and testing8.7Evaluation of false alarms8.8Safety argument8.9Report and presentation8.10Final review with the tutor
How you'll learn
100 % online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: students progress at their own pace within the intake, which makes it possible to combine study with work.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is RTAMT, UPPAAL, MATLAB Simulink Design Verifier, ROS 2, Polyspace, in free, academic or evaluation versions. Tests are studied on real procedures for STL monitoring of traffic rules, simplex architecture in simulation, and formal verification of the switching logic. Assessment is continuous per module plus the final integrating project.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Understand the role of runtime monitoring.
Specify safety properties using temporal logic.
Design safety kernels and simplex architectures.
Monitor components based on artificial intelligence.
Implement efficient monitors on embedded platforms.
Where this takes you
Requirements
- Prior technical training or professional experience in the sector. A university degree is not required.
- Internet connection and a computer capable of running the programme's software.
- Sufficient Spanish to follow technical regulatory texts.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme comprises 800 hours in total, spread over 6 to 8 months. That is between 10 and 15 hours a week on average, compatible with a full-time job.
Work is carried out with RTAMT, UPPAAL, MATLAB Simulink Design Verifier, ROS 2, Polyspace. Free, academic or evaluation versions are used, and the tutor indicates the free alternative where one exists.
An own diploma from SEIUM Institute upon passing the continuous assessment and the integrating project. It is in-house training, not an official qualification from the Ministry.
Yes. Modules passed in a course or postgraduate diploma in the same area are credited towards the advanced programme. Check the credit transfer policy when you enrol.
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