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Diploma in SI/PI for DDR/SerDes and Current Return

The Diploma in SI/PI for DDR/SerDes and Current Feedback delves into the design and analysis of signal systems (SI) and power integrity (PI) for high-speed interfaces such as DDR and SerDes, as well as current feedback design. It focuses on the application of advanced methodologies and tools to ensure signal integrity and power supply, crucial for the performance and reliability of electronic systems.

The program covers SI/PI simulation and measurement, signal channel modeling, and current feedback mitigation, in compliance with applicable standards and regulations for high-speed system design. It offers hands-on experience in laboratories and the use of simulation tools. This training prepares students for professional roles such as circuit designers, SI/PI engineers, and electronic systems engineers, strengthening employability in industries such as telecommunications, computing, and automotive.

Duration6–8 months
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

SI/PI Mastery in DDR/SerDes and Current Feedback: Advanced Design and Optimization [The following appears to be unrelated and possibly machine-translated gibberish:]

02

In-depth Analysis and Optimization of SI/PI in DDR/SerDes and Current Return

03

Comprehensive user-oriented design and validation (from modeling to manufacturing)

04

SI/PI Optimization: Design and Simulation of DDR/SerDes and Current Return

05

Master's Degree in SI/PI for DDR/SerDes and Current Return: Design, Simulation, and Analysis of Current Return

06

Excellence in SI/PI: Design, Analysis, and Optimization of DDR/SerDes and Current Return

07

Expert Optimization of SI/PI for DDR/SerDes and Current Return: High-Performance Analysis and Design [The following appears to be unrelated and possibly machine-translated gibberish:]

08

Master Implementation of SI/PI in DDR/SerDes and Current Return: Comprehensive Design and Optimization

Profile

Who it's for

  • Engineers with degrees in Aerospace Engineering, Mechanical Engineering, Industrial Engineering, Automation Engineering, or related disciplines.
  • Professionals working in Aircraft Design, Maintenance, Repair and Operations (MRO), Consulting, or Research and Technological Development Centers.
  • Specialists in Flight Testing, Aeronautical Certification, Avionics, Control Systems, or Flight Dynamics who wish to deepen their knowledge.
  • Personnel from Regulatory Authorities Aeronautical professionals and other key players in the Urban Air Mobility (UAM) and eVTOL sectors who require knowledge of regulatory compliance. Recommended requirements: Basic knowledge of aerodynamics, control systems, and structures. Proficiency in English (B2+/C1). We offer bridging tracks to facilitate your entry.
Standards & tools

What you'll work with

  • Standards-driven curriculum: you will work with CS-27/CS-29, DO-160, DO-178C/DO-254, ARP4754A/ARP4761, ADS-33E-PRF from the first module.
  • Accreditable laboratories (EN ISO/IEC 17025) with rotor bench, EMC/Lightning pre-compliance, HIL/SIL, vibrations/acoustics.
  • Evidence-oriented TFM: safety case, test plan, compliance dossierand operational limits.
  • Mentored by industry: teachers with experience in rotorcraft, tiltrotor, eVTOL/UAM and flight test.
  • Flexible modality (hybrid/online), international cohorts and support from SEIUM Career Services.
  • Ethics and security: safety-by-design approach, cyber-OT, DIH and compliance as pillars.
Syllabus

10 modules

  1. 1.1SI/PI Fundamentals: Key Concepts and Definitions
  2. 1.2SI/PI System Components: Analysis and Characterization
  3. 1.3Printed Circuit Board Design: Principles and Best Practices
  4. 1.4Transmission Line Modeling: Theory and Applications
  5. 1.5Impedance Analysis: Techniques and Tools
  6. 1.6Feeder Plan Design: Strategies and Optimization
  7. 1.7Current Reverse Control: Techniques and Considerations
  8. 1.8DDR Interconnection Design: Requirements and Challenges
  9. 1.9SerDes Interconnection Design: Specifications and Considerations
  10. 1.10SI/PI Simulation Tools: Introduction and Applications
  11. 1.10
  1. 2.2SI/PI Fundamentals in DDR/SerDes: Review of Key Concepts
  2. 2.2Impedance and Reflection Analysis in DDR/SerDes
  3. 2.3Transmission Line Characterization for DDR/SerDes
  4. 2.4Interconnection Modeling for DDR/SerDes
  5. 2.5PCB Design Optimization for DDR/SerDes
  6. 2.6Current Return Analysis in High-Speed ​​Systems
  7. 2.7Noise and Crosstalk Mitigation Techniques
  8. 2.8SI/PI Simulation and Validation in DDR/SerDes
  9. 2.9Tools and Software for SI/PI Analysis
  10. 2.20Case Studies: Analysis and Optimization of DDR/SerDes Designs
  11. 2.3
  1. 3.3Signal Modeling in DDR/SerDes: Fundamentals and Advanced Techniques
  2. 3.2SI/PI Simulation in DDR/SerDes: Tools and Methodologies
  3. 3.3Current Feedback Modeling and Simulation: Essential Techniques
  4. 3.4Designing Optimized Layouts for DDR/SerDes
  5. 3.5Signal Integrity Analysis for DDR/SerDes
  6. 3.6Power Integrity Analysis for DDR/SerDes
  7. 3.7Performance Improvement in DDR/SerDes Systems: Strategies and Optimization
  8. 3.8Modeling Components and Structures in DDR/SerDes
  9. 3.9Jitter and Eye Diagram Simulation in SerDes
  10. 3.30Case Studies: Analysis and Solutions in DDR/SerDes Designs
  1. 4.4Introduction to SI/PI in DDR/SerDes and Current Feedback
  2. 4.2Fundamentals of PCB Design for SI/PI
  3. 4.3Signal Modeling and Simulation in DDR/SerDes
  4. 4.4Current Feedback Analysis: Design and Optimization
  5. 4.5Layer Design and Stacking for SI/PI
  6. 4.6SI/PI Simulation and Analysis Tools
  7. 4.7Signal Integrity Optimization in DDR/SerDes
  8. 4.8Power Integrity Improvement: Design and Simulation
  9. 4.9Design for EMI/EMC in High-Speed ​​Systems
  10. 4.40Case Studies: Analysis and Problem Solving in SI/PI
  11. 4.5
  1. 5.5Introduction to SI/PI in DDR/SerDes: Fundamentals and Challenges
  2. 5.5PCB Design for DDR/SerDes: Key Considerations
  3. 5.3Current Return Optimization: Advanced Techniques
  4. 5.4Impedance Analysis and Trace Design
  5. 5.5​​SI/PI Simulation: Tools and Methodologies
  6. 5.6Power and Return Plan Design
  7. 5.7Noise Mitigation Strategies in DDR/SerDes
  8. 5.8Component Selection and Stack-up Design
  9. 5.5Introduction to Deep SI/PI Analysis
  10. 5.5Component and Device Modeling
  11. 5.3Signal Integrity Analysis in DDR/SerDes
  12. 5.4Power Integrity and Current Return Analysis
  13. 5.5Advanced Simulation: Techniques and Tools
  14. 5.6Jitter Analysis and Eye Diagrams
  15. 5.7Design Optimization: Methodologies and Best Practices
  16. 5.8Case Studies Study: Failure Analysis and Solutions
  17. 3.5Introduction to SI/PI Modeling and Simulation
  18. 3.5Component Modeling: S-Parameters and IBIS Models
  19. 3.3Circuit Simulation: Transient and Frequency Analysis
  20. 3.4DDR/SerDes Simulation: Design and Analysis
  21. 3.5Current Feedback Analysis: Modeling and Mitigation
  22. 3.6Performance Optimization: Advanced Techniques
  23. 3.7Design for Reliability: Analysis and Validation
  24. 3.8Design Reports and Documentation
  25. 4.5Introduction to SI/PI Optimization
  26. 4.5Trace Design: Impedance and Length
  27. 4.3SI/PI Simulation: Tools and Configurations
  28. 4.4Power Plan Design: Optimization and Filtering
  29. 4.5Current Feedback Optimization: Key Strategies
  30. 4.6Noise Analysis: Sources and Mitigation
  31. 4.7DDR/SerDes Design: Specific Considerations
  32. 4.8Design of PCB: Design, Simulation, and Validation
  33. 5.5PCB Design for DDR/SerDes: Material Selection and Design
  34. 5.5​​Advanced Simulation: Methodologies and Analysis
  35. 5.3Current Feedback Analysis: Design and Mitigation
  36. 5.4Signal Integrity Optimization: DDR/SerDes
  37. 5.5Power Plan Design: Distribution and Filtering
  38. 5.6Noise Analysis: Sources, Mitigation, and Design
  39. 5.7System Design: Analysis and Simulation
  40. 5.8Design Validation and Verification
  41. 6.5Introduction to SI/PI Design and Analysis
  42. 6.5PCB Design: Key Aspects and Best Practices
  43. 6.3Signal Integrity Analysis: DDR/SerDes
  44. 6.4Power Integrity Analysis: Distribution and Filtering
  45. 6.5Current Feedback Optimization: Advanced Strategies
  46. 6.6Noise Analysis: Sources and Mitigation
  47. 6.7Simulation Advanced: Techniques and Tools
  48. 6.8Design for Production: Manufacturing and Assembly
  49. 7.5High-Performance SI/PI Analysis: Fundamentals and Strategies
  50. 7.5Trace Design: Impedance, Length, and Coupling
  51. 7.3Signal Integrity Analysis: DDR/SerDes and SerDes
  52. 7.4Power Integrity Analysis: Design and Optimization
  53. 7.5Current Return Optimization: Mitigation and Design
  54. 7.6Noise Analysis: Sources, Coupling, and Mitigation
  55. 7.7Advanced Simulation: Tools and Methodologies
  56. 7.8Design for Reliability: Validation Strategies
  57. 8.5Introduction to Integrated SI/PI Implementation
  58. 8.5PCB Design: Design, Manufacturing, and Assembly
  59. 8.3Signal Integrity Analysis: DDR/SerDes and SerDes
  60. 8.4Power Integrity Analysis: Design and Optimization
  61. 8.5Current Return Optimization Current: Mitigation Strategies
  62. 8.6Noise Analysis: Sources, Mitigation, and Design
  63. 8.7Advanced Simulation: Validation and Verification
  64. 8.8Implementation and Testing: Design and Manufacturing
  65. 8.8
  1. 6.6SI/PI Design in DDR/SerDes: Fundamentals and Methodology
  2. 6.2Impedance and Reflection Analysis in DDR/SerDes
  3. 6.3Current Return Design: Noise Minimization
  4. 6.4Simulation and Modeling of DDR/SerDes Channels
  5. 6.5Trace and Component Optimization for SI/PI
  6. 6.6Layer Design and Stacking for SI/PI Performance
  7. 6.7SI/PI Simulation and Analysis Tools
  8. 6.8Signal Integrity Analysis in DDR/SerDes
  9. 6.9Performance Improvement: Problem Mitigation Techniques
  10. 6.60SI/PI Design, Analysis, and Optimization: Practical Applications
  1. 7.7SI/PI Fundamentals: Review of Key Concepts
  2. 7.2High-Speed ​​Trace Design for DDR/SerDes
  3. 7.3Advanced SI Optimization Techniques
  4. 7.4Current Feedback Analysis and Mitigation
  5. 7.7Power and Ground Plane Design
  6. 7.6Simulation Tools and Software
  7. 7.7Practical Implementation and Validation
  8. 7.8Connector and Component Design
  9. 7.9EMC/EMI Considerations
  10. 7.70Case Studies and Best Practices
  11. 2.7SI/PI Analysis Methodology
  12. 2.2Detailed DDR/SerDes Modeling and Simulation
  13. 2.3Advanced SI/PI Optimization Techniques
  14. 2.4Signal Integrity and Power Analysis
  15. 2.7Current Feedback Simulation and Mitigation
  16. 2.6Noise and Crosstalk Analysis 2.7 Filter and Equalization Design
  17. 2.8High-Speed ​​Signal Integrity Analysis
  18. 2.9Analysis and Diagnostic Tools
  19. 2.70Design Reports and Documentation
  20. 3.7DDR/SerDes Component and System Modeling
  21. 3.2SI/PI Simulation: Techniques and Tools
  22. 3.3Design Optimization for Performance Improvement
  23. 3.4Impedance Analysis and Its Impact
  24. 3.7PCB Design for DDR/SerDes
  25. 3.6Measurement and Validation Methods
  26. 3.7Advanced Simulation Techniques
  27. 3.8Crosstalk Analysis and Mitigation
  28. 3.9Current Feedback Solution Design
  29. 3.70Reporting and Results Presentation
  30. 4.7DDR/SerDes System Design
  31. 4.2SI/PI Simulation: Tools and Techniques 4.3 Trace and Component Optimization
  32. 4.4Noise and Crosstalk Analysis
  33. 4.7Power and Ground Plane Design
  34. 4.6Connector Selection and Design
  35. 4.7Equalization and Pre-emphasis Design
  36. 4.8Current Feedback Simulation
  37. 4.9Design Verification and Validation
  38. 4.70Design and Documentation
  39. 7.7Advanced SI/PI Design for DDR/SerDes
  40. 7.2SI/PI Simulation: Tools and Methods
  41. 7.3Current Feedback Analysis: Modeling and Mitigation
  42. 7.4Power and Ground System Design
  43. 7.7Signal Integrity Analysis in High-Speed ​​Systems
  44. 7.6Equalization and Pre-emphasis Design
  45. 7.7Advanced Simulation Techniques
  46. 7.8Impedance Analysis Methods 7.9 PCB Design to Minimize Noise
  47. 7.70Complex Case Studies
  48. 6.7Design of High-Performance DDR/SerDes Systems
  49. 6.2Signal and Power Integrity Analysis
  50. 6.3Trace and Component Optimization
  51. 6.4Power and Ground Plane Design
  52. 6.7Noise and Crosstalk Analysis
  53. 6.6Equalization and Pre-emphasis Design
  54. 6.7High-Density PCB Design
  55. 6.8Advanced Simulation and Modeling
  56. 6.9Measurement and Validation Methods
  57. 6.70Best Practices and Case Studies
  58. 7.7High-Performance Design Methodology
  59. 7.2Signal and Power Integrity Analysis
  60. 7.3Trace and Component Optimization
  61. 7.4Current Feedback Analysis
  62. 7.7Power and Ground Plane Design 7.6 Noise and Crosstalk Analysis
  63. 7.7Advanced SI/PI Simulation
  64. 7.8Component and Material Selection
  65. 7.9Manufacturing and Assembly Considerations
  66. 7.70Case Studies of Complex Designs
  67. 8.7Design of Integrated DDR/SerDes Systems
  68. 8.2System-Level SI/PI Optimization
  69. 8.3Power and Ground Plane Design
  70. 8.4Current Return Analysis and Mitigation
  71. 8.7Component and Material Selection
  72. 8.6Implementation of Optimization Techniques
  73. 8.7EMC/EMI Considerations
  74. 8.8Implementation of Tools and Software
  75. 8.9Design Validation and Verification
  76. 8.70Complete Design and Optimization Documentation
  1. 8. SI/PI Mastery: Design and Optimization
  2. 8.8Introduction to Signal Integral (SI) and Power Integrity (PI) in High-Speed ​​Systems
  3. 8.8Fundamentals of DDR/SerDes and its Impact on SI/PI
  4. 8.3Printed Circuit Board (PCB) Design for SI/PI Optimization
  5. 8.4Current Return Optimization Techniques
  6. 8.5Simulation and Analysis Tools for SI/PI
  7. 8.6Case Studies: Design and Optimization in Real-World Scenarios
  8. 8.7Performance Improvement and Mitigation of Common Problems
  9. 8.8Prototype Design and Initial Testing
  10. 8.8Implementation of Design Strategies to Improve Signal Integrity and Power
  11. 8.80Troubleshooting and Final Design Adjustments
  12. 8. SI/PI DDR/SerDes Analysis and Optimization
  13. 8.8Detailed Signal Analysis in DDR/SerDes Interfaces
  14. 8.8Advanced SI/PI Optimization Techniques for DDR/SerDes
  15. 8.3Modeling and Simulation of High-Speed ​​Channels
  16. 8.4PCB Design to Minimize Signal Degradation
  17. 8.5Managing Crosstalk and Other Signal Effects
  18. 8.6Optimizing Current Return in Complex Designs
  19. 8.7Performance Evaluation and Troubleshooting
  20. 8.8Design and Analysis of Efficient Power Supply Circuits
  21. 8.8Techniques for Improving Noise Margin and Stability
  22. 8.80Best Practices for Design Implementation and Testing
  23. 3. Advanced SI/PI: Modeling and Simulation
  24. 3.8Modeling Components and Connections in SI/PI
  25. 3.8Simulating Complex Scenarios and Analyzing Results
  26. 3.3Advanced Techniques for DDR/SerDes Simulation
  27. 3.4Current Return Modeling and Critical Path Analysis 3.5 Industry-leading simulation tools and software.
  28. 3.6Performance optimization through simulation and analysis.
  29. 3.7Signal integrity analysis under different operating conditions.
  30. 3.8Design and simulation of filters and impedance matching circuits.
  31. 3.9Improving simulation accuracy and efficiency.
  32. 3.0Design validation and adjustments based on simulations.
  33. 4. SI/PI Optimization: Design and Simulation
  34. 4.8Design strategies for SI/PI optimization.
  35. 4.9PCB design for high speed and low interference.
  36. 4.3Simulation of complex designs and analysis of results.
  37. 4.4Current return optimization and noise management.
  38. 4.5Design and simulation of efficient power supply circuits.
  39. 4.6Crosstalk mitigation techniques and other signal effects.
  40. 4.7Signal integrity analysis under different operating scenarios. 4.8 Integration of design and simulation tools.
  41. 4.8Prototype development and testing.
  42. 4.80Performance evaluation and optimization.
  43. 5. SI/PI Master's: Design and Feedback
  44. 5.8Design of high-speed systems with a focus on SI/PI.
  45. 5.8Analysis and design of advanced current feedback systems.
  46. 5.3Multilayer PCB design to optimize SI/PI.
  47. 5.4Simulation and analysis of complex scenarios.
  48. 5.5Design of low-noise power supply circuits.
  49. 5.6Performance optimization through modeling and simulation.
  50. 5.7Performance evaluation and advanced troubleshooting.
  51. 5.8Implementation of cutting-edge design techniques.
  52. 5.8Best practices for design validation.
  53. 5.80Case studies and practical examples.
  54. 6. SI/PI: Design, Analysis, and Optimization
  55. 6.8Fundamental Principles of SI/PI in High-Speed ​​Systems
  56. 6.8PCB Design to Optimize Signal Integrity and Power
  57. 6.3Detailed Signal Analysis in DDR/SerDes
  58. 6.4Current Return Optimization and Noise Management
  59. 6.5Simulation and Modeling Techniques for SI/PI
  60. 6.6Performance Evaluation and Troubleshooting
  61. 6.7Implementation of Advanced Design Strategies
  62. 6.8Design and Analysis of Efficient Power Supply Circuits
  63. 6.8Testing and Validation of Designs
  64. 6.80Case Studies and Practical Examples
  65. 7. SI/PI Expert: Analysis and Design
  66. 7.8Analysis of High-Speed ​​Systems and Their Impact on SI/PI
  67. 7.8Advanced PCB Design to Minimize Signal Degradation
  68. 7.3Modeling and Simulation of Complex High-Speed ​​Channels
  69. 7.4Current return optimization in high-performance designs.
  70. 7.5Noise and crosstalk mitigation techniques.
  71. 7.6Design and simulation of low-noise power supply systems.
  72. 7.7Signal integrity analysis in harsh environments.
  73. 7.8Implementation of innovative design techniques.
  74. 7.9Testing and validation of complex designs.
  75. 7.10Case studies and analysis of real-world projects.
  76. 8. Comprehensive SI/PI Implementation
  77. 8.8Design of complete SI/PI systems from conception to production.
  78. 8.9Component and material selection.
  79. 8.3PCB design for manufacturing.
  80. 8.4Comprehensive SI/PI simulation and analysis.
  81. 8.5Design testing and validation.
  82. 8.6Performance optimization and troubleshooting.
  83. 8.7Project management and quality control. 8.8 Implementation of industry best practices.
  84. 8.8Case studies and practical examples.
  85. 8.80Certification and compliance with standards.
  1. 9. Design of high-speed signal paths for DDR and SerDes
  2. 9. PCB layer planning and stacking to minimize crosstalk
  3. 3. Analysis of the impact of terminations on signal performance
  4. 4. Optimization of signal integrity to minimize signal loss
  5. 5. Design and analysis of power and ground planes
  6. 6. Modeling and simulation of backflow current
  7. 7. Mitigation of backflow problems in DDR and SerDes designs
  8. 8. Design of high-frequency power and decoupling filters
  9. 9. Impedance and reflection analysis in DDR and SerDes transmission lines
  10. 9. Identification and mitigation of crosstalk problems
  11. 3. Analysis of eye window limitations
  12. 4. Evaluation of the impact of noise on signal performance
  13. 5. Analysis of power supply integrity and power distribution
  14. 6. Design optimization to reduce electromagnetic interference (EMI)
  15. 7. Study of the impact of manufacturing process variables on SI/PI
  16. 8. Backflow analysis in systems Complex Systems
  17. 9. Modeling of Passive and Active Components for SI/PI Simulation
  18. 9. Simulation of Signal Integrity and Power Distribution
  19. 3. Design Optimization to Improve Signal Performance
  20. 4. Analysis of the Impact of Temperature Variation on Performance
  21. 5. Evaluation of the Impact of Manufacturing Tolerances on Design
  22. 6. Design of Performance Improvement Strategies for DDR and SerDes Systems
  23. 7. Implementation of 3D Modeling Techniques for Increased Accuracy
  24. 8. Simulation and Optimization of Current Feedback Systems
  25. 9. Design of DDR and SerDes Systems to Maximize Performance
  26. 9. Simulation of Complex Circuits to Optimize Design
  27. 3. Evaluation of the Impact of Process Variations on Performance
  28. 4. Optimization of PCB Design to Minimize Noise and Crosstalk
  29. 5. Design of Termination Strategies to Improve Signal Integrity
  30. 6. Simulation of Current Feedback Characteristics
  31. 7. Design Optimization to Meet Regulatory Compliance Requirements
  32. 8. Design Validation through Simulation and Measurement
  33. 9. Design of Complex Systems Power distribution
  34. 9. Detailed simulation of current return systems
  35. 3. Analysis of the effects of crosstalk in high-speed systems
  36. 4. Design of routing strategies to minimize noise and interference
  37. 5. Optimization of designs to meet performance specifications
  38. 6. Analysis of signal integrity in DDR and SerDes systems
  39. 7. Simulation and optimization of multilayer PCB designs
  40. 8. Implementation of design strategies to reduce manufacturing costs
  41. 9. Design of high-performance SI/PI systems
  42. 9. Comprehensive analysis of signal integrity and power distribution
  43. 3. Optimization of complex designs to maximize performance
  44. 4. Design and analysis of advanced decoupling strategies
  45. 5. Implementation of advanced modeling and simulation techniques
  46. 6. Design of solutions for high-density, high-speed environments
  47. 7. Evaluation of the impact of environmental conditions on performance
  48. 8. Analysis and optimization of designs to minimize manufacturing costs
  49. 9. Advanced analysis of signal integrity and power distribution
  50. 9. Design of systems High performance for DDR and SerDes
  51. 3. Optimization of complex designs to meet specific requirements
  52. 4. Implementation of design techniques to reduce noise and interference
  53. 5. Detailed analysis of the impact of manufacturing variables on performance
  54. 6. Design of solutions for high-speed, high-density applications
  55. 7. Electromagnetic compatibility (EMC) assessment and EMI mitigation
  56. 8. Development of strategies to improve performance and reduce costs
  57. 9. Design and implementation of complete SI/PI solutions
  58. 9. Comprehensive design optimization to maximize performance
  59. 3. Design lifecycle analysis and total cost optimization
  60. 4. Integration of industry best practices
  61. 5. Design for manufacturability (DFM) and design for testing (DFT)
  62. 6. Management of SI/PI design projects
  63. 7. Effective communication and collaboration in design teams
  64. 8. Implementation of risk mitigation strategies
  1. 1.1SI/PI Environment Design for DDR/SerDes: Requirements and Specification Analysis
  2. 1.2Component Selection and Modeling: PCBs, Connectors, and Cables
  3. 1.3Trace and Power Plane Design: Advanced Routing Techniques
  4. 1.4Current Return Optimization: Strategies to Minimize Interference
  5. 1.5SI/PI Simulation: Tools and Methodologies for DDR/SerDes
  6. 1.6Signal Integrity Analysis: Measurements and Problem Mitigation
  7. 1.7Prototype Design and Testing: Performance Validation
  8. 1.8Performance Improvement: Techniques to Achieve Design Objectives
  9. 1.9Manufacturing and Assembly Considerations: Design for Production
  10. 1.10Design Documentation: Creating Technical Reports and Documentation
Methodology, software & labs

How you'll learn

  • Hands-on methodology: test-before-you-trust, design reviews, failure analysis, compliance evidence.
  • Software (depending on licenses/partners): MATLAB/Simulink, Python (NumPy/SciPy), OpenVSP, SU2/OpenFOAM, Nastran/Abaqus, AMESim/Modelica, acoustics tools, planning toolchains DO-178C.
  • SEIUM Laboratories: scale rotor bench, vibrations/acoustics, EMC/Lightning pre-compliance, HIL/SIL for AFCS, data acquisition with strain gauging.
  • Standards and compliance: EN 9100, 17025, ISO 27001, GDPR.
Accreditable laboratories(EN ISO/IEC 17025) with rotor bench, EMC/Lightning pre-compliance, HIL/SIL, vibrations/acoustics.
Evidence-oriented Master's Thesis:safety case, test plan, compliance dossier and operational limits.
Industry Mentored:teachers with experience in training, , eVTOL/UAM and flight test.
Flexible modality(hybrid/online), international cohorts and support from SEIUM Career Services.
Ethics and safety:safety-by-design approach, cyber-OT, DIH and compliance as pillars.
Career opportunities

Where this takes you

Systems Designer (SI/PI) (DDR, SerDes)SI/PI Design Engineer (DDR, SerDes, Current Return)SI/PI Design Engineer (DDR, SerDes, Current Return)**SI/PI Design Engineer** (DDR, SerDes, Current Return)**SI/PI Engineer** (DDR, SerDes, Current Return)**SI/PI Engineer** (DDR, SerDes, Current Return)
Admissions & scholarships

Requirements

  • Profile: Background in Computer Engineering, Mathematics, Statistics, or related fields; practical experience in NLP and valued information retrieval systems.
  • Documentation: Updated CV, academic transcript, SOP/statement of purpose, project examples or code (optional).
  • Process: Application → Technical evaluation of profile and experience → Technical interview → Review of case studies → Final decision → Enrollment.
  • Fees:
    • Single payment: 10% discount.
    • Payment in 3 installments: No fees; 30% upon registration + 2 equal monthly payments of the remaining 35%. Monthly payment: available with a 7% commission on the total; annual review. Scholarships: based on academic merit, financial need, and promoting inclusion; agreements with companies in the sector for partial or full scholarships. See "Calendar & Calls for Applications," "Scholarships & Grants," and "Fees & Financing" in the SEIUM mega-menu.

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FAQ

Frequently asked questions

Yes, we have international certification

Yes: experimental models, real data, applied simulations, professional environments, real case studies.

It is not mandatory. We offer leveling tracks and tutoring.

Completely. It covers e-propulsion, integration, and emerging regulations (SC-VTOL).

Recommended. There are also internal challenges and consortiums.

Yes. Online/hybrid modality with planned labs and visa support (see “Visa & Residence”).

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