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Master'sElectronics, Embedded Systems & Telecom Applications open

Master’s in Reliability, Derating and Design for Manufacture Engineering

Online master's programme of 1,900 hours in reliability, derating and design for manufacturing engineering. 12 modules covering reliability statistics and prediction, component derating to ECSS-Q-ST-30-11C, FMEA to IEC 60812, physics of failure, accelerated testing, DFM/DFA, design for test, supply chain and field reliability, with an assigned technical tutor.

Duration1900 h
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

Apply statistical reliability models to electronic products.

02

Define and verify component derating rules.

03

Carry out FMEA, FMEDA and fault tree analyses.

04

Design accelerated life tests and analyse their results.

05

Apply design for manufacturing, assembly and test principles.

06

Manage component obsolescence and quality.

07

Use field data to improve product reliability.

Profile

Who it's for

  • Reliability engineers working with prediction, testing and field data.
  • Component engineers responsible for selection, derating and obsolescence.
  • Industrialisation engineers taking products from design to production.
  • Product quality engineers handling returns and root-cause analysis.
  • Design-for-manufacturing engineers working with contract manufacturers.
  • Failure analysis engineers investigating physical failure mechanisms.
  • Engineering or science graduates seeking to move into the aerospace sector.
Standards & tools

What you'll work with

  • IEC 61709 (reference conditions for failure rates)
  • ECSS-Q-ST-30-11C (derating of EEE components)
  • IEC 60812 (failure mode and effects analysis, FMEA)
  • MIL-HDBK-217F (reliability prediction of electronic equipment)
  • IPC-A-610H (acceptability of electronic assemblies)
  • IEC 61649 (Weibull analysis)
  • IEC 61124 (reliability compliance testing)
  • JEDEC JEP122 (failure mechanisms and models for semiconductor devices)
  • Ansys Sherlock
  • ReliaSoft Weibull++
  • Isograph Reliability Workbench
  • Minitab
  • Altium Designer
Syllabus

12 modules · 1900 h

  1. 1.1Reliability, maintainability and availability
  2. 1.2Product reliability programme
  3. 1.3Reliability requirements and their allocation
  4. 1.4Bathtub curve and infant mortality
  5. 1.5Survival and hazard functions
  6. 1.6MTBF, MTTF and FIT metrics
  7. 1.7Reliability in the development cycle
  8. 1.8Life-cycle cost
  9. 1.9Reliability culture in the organisation
  10. 1.10Case study: reliability requirements for industrial equipment
  1. 2.1Exponential distribution and constant rate
  2. 2.2Weibull distribution and its parameters
  3. 2.3Lognormal distribution in wear-out mechanisms
  4. 2.4Maximum likelihood estimation
  5. 2.5Handling censored data
  6. 2.6Confidence intervals
  7. 2.7Probability plots
  8. 2.8Comparing populations
  9. 2.9Analysis with Weibull++
  10. 2.10Practical: Weibull analysis of life data
  1. 3.1Parts-count prediction methods
  2. 3.2Component stress analysis
  3. 3.3MIL-HDBK-217F and its limitations
  4. 3.4IEC 61709 and application factors
  5. 3.5FIDES prediction methodology
  6. 3.6Physics-of-failure models
  7. 3.7Mission profiles and usage cycles
  8. 3.8Reliability block diagrams
  9. 3.9Reliability of redundant systems
  10. 3.10Lab: reliability prediction with Reliability Workbench
  1. 4.1Concept and objectives of derating
  2. 4.2Voltage, current and power derating
  3. 4.3Thermal derating and junction temperature
  4. 4.4ECSS-Q-ST-30-11C rules
  5. 4.5Derating of semiconductors
  6. 4.6Derating of capacitors
  7. 4.7Derating of resistors and magnetics
  8. 4.8Derating of connectors and cables
  9. 4.9Verification of derating in the design
  10. 4.10Workshop: derating analysis of a power supply
  1. 5.1Design FMEA to IEC 60812
  2. 5.2Process FMEA
  3. 5.3FMEDA for functional safety
  4. 5.4Fault trees
  5. 5.5Worst-case circuit analysis
  6. 5.6Sneak circuit analysis
  7. 5.7Risk priority and action plans
  8. 5.8Integration with requirements
  9. 5.9Analysis tools
  10. 5.10Case study: FMEDA of an input module
  1. 6.1Thermal fatigue of solder joints
  2. 6.2Vibration and mechanical fatigue
  3. 6.3Electromigration in semiconductors
  4. 6.4Gate dielectric breakdown
  5. 6.5Corrosion and electrochemical migration
  6. 6.6Flex cracking in ceramic capacitors
  7. 6.7Degradation of electrolytic capacitors
  8. 6.8Mechanisms according to JEDEC JEP122
  9. 6.9Life simulation with Sherlock
  10. 6.10Practical: solder joint life estimation
  1. 7.1Arrhenius acceleration models
  2. 7.2Coffin-Manson and Peck models
  3. 7.3HALT limit testing
  4. 7.4HASS screening in production
  5. 7.5Quantitative accelerated life testing
  6. 7.6Designing test plans
  7. 7.7IEC 61124 demonstration tests
  8. 7.8Burn-in and its justification
  9. 7.9Analysis of test results
  10. 7.10Lab: accelerated life test plan
  1. 8.1DFM principles in electronics
  2. 8.2DFA principles
  3. 8.3Package selection
  4. 8.4Placement rules for soldering
  5. 8.5Panelisation and depaneling
  6. 8.6Design for automated inspection
  7. 8.7Design for in-circuit test
  8. 8.8IPC-A-610H criteria
  9. 8.9Collaboration with the manufacturer
  10. 8.10Workshop: DFM review of a design
  1. 9.1Production test strategy
  2. 9.2In-circuit testing with a bed of nails
  3. 9.3Flying probe testing
  4. 9.4Boundary scan, IEEE 1149.1
  5. 9.5End-of-line functional testing
  6. 9.6Coverage of manufacturing defects
  7. 9.7In-line device programming
  8. 9.8Statistical process control in production
  9. 9.9Unit and batch traceability
  10. 9.10Workshop: test strategy for a board
  1. 10.1Component selection and qualification
  2. 10.2Preferred parts lists
  3. 10.3Obsolescence management
  4. 10.4Counterfeit components and their prevention
  5. 10.5Qualification of alternative manufacturers
  6. 10.6Moisture sensitivity and storage
  7. 10.7Components for automotive and space
  8. 10.8Supplier audits
  9. 10.9Manufacturer change management
  10. 10.10Case study: obsolescence management plan
  1. 11.1Field data collection
  2. 11.2Returns analysis
  3. 11.3FRACAS failure reporting system
  4. 11.4Root cause analysis
  5. 11.5Reliability growth
  6. 11.6Warranty analysis
  7. 11.7Feedback to design
  8. 11.8Field quality indicators
  9. 11.9Lessons learned register
  10. 11.10Practical: warranty data analysis
  1. 12.1Selection of the product under study
  2. 12.2Reliability requirements
  3. 12.3Reliability prediction
  4. 12.4Derating analysis
  5. 12.5Failure mode analysis
  6. 12.6DFM and DFA review
  7. 12.7Accelerated test plan
  8. 12.8Conclusions and recommendations
  9. 12.9Master's Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, so it fits around your job.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Ansys Sherlock, ReliaSoft Weibull++, Isograph Reliability Workbench, Minitab and Altium Designer, in free, academic or evaluation versions. Work is based on real procedures: derating analysis of a board's components, accelerated life testing with Weibull analysis, and DFM and DFA review of an electronic assembly. Assessment is continuous per module, plus the final Master's Thesis.

Standards covered: IEC 61709, ECSS-Q-ST-30-11C, IEC 60812, MIL-HDBK-217F, IPC-A-610H, IEC 61649, IEC 61124, JEDEC JEP122.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of IEC 61709, ECSS-Q-ST-30-11C and IEC 60812 applied to real cases, not as a theoretical annex.
Industry software:Ansys Sherlock, ReliaSoft Weibull++, Isograph Reliability Workbench, Minitab and Altium Designer, in free, academic or evaluation versions.
Master's Thesis with defence:A complete reliability study of a product, covering prediction, derating, failure mode analysis, DFM/DFA review and an accelerated test plan, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Weibull analysis
Analyse life data with Weibull++ and estimate reliability.
Derating analysis
Verify the component derating of a power supply.
FMEDA
Carry out an FMEDA of an input module.
Accelerated life test plan
Design an accelerated life test and a DFM review.
Master's Thesis
A complete product reliability and manufacturability study, defended before a panel.
Career opportunities

Where this takes you

Reliability engineerComponent engineerIndustrialisation engineerProduct quality engineerDesign-for-manufacturing engineerFailure analysis engineer
Admissions & scholarships

Requirements

  • University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • Internet connection and a computer capable of running the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

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FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with Ansys Sherlock, ReliaSoft Weibull++, Isograph Reliability Workbench, Minitab and Altium Designer, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme software, and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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