Master’s in IoT Cybersecurity Engineering
Online master's programme of 1,900 hours in IoT cybersecurity engineering, structured in 12 modules covering IoT attack surface and threat modelling, embedded cryptography, hardware security, secure boot and firmware, secure communications, device identity, cloud security, device security assessment, detection and response, regulation and secure development, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this programme. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Identify the attack surface and model threats in IoT systems.
Apply cryptography suited to resource-constrained devices.
Implement hardware security and secure boot mechanisms.
Protect device communications and identity.
Assess device security through controlled testing.
Apply European product cybersecurity regulations.
Design an IoT product that remains secure throughout its lifecycle.
Who it's for
- IoT cybersecurity engineers securing devices from silicon to cloud.
- Product security analysts assessing connected products.
- Secure firmware developers implementing secure boot, TLS and OTA.
- Cybersecurity compliance consultants preparing clients for the Cyber Resilience Act.
- Device security auditors running penetration tests on IoT products.
- PSIRT managers handling vulnerabilities and disclosure.
- Engineering or science graduates aiming to work in consumer electronics.
What you'll work with
- ETSI EN 303 645 (cybersecurity for consumer IoT)
- Regulation (EU) 2024/2847 (Cyber Resilience Act)
- EN 18031-1 (RED cybersecurity requirements for internet-connected radio equipment)
- IEC 62443-4-2 (technical security requirements for IACS components)
- NIST IR 8259A (IoT device cybersecurity capability core baseline)
- ISO/IEC 27001 (information security management systems)
- PSA Certified (security certification framework for IoT chips and devices)
- OWASP ISVS (IoT Security Verification Standard)
- Wireshark
- binwalk
- Ghidra
- MCUboot
- OpenSSL
12 modules · 1900 h
1.1. Components of an IoT ecosystem1.2. Attack vectors on device, network and cloud1.3. OWASP IoT Top 10 list1.4. Historical incidents and botnets such as Mirai1.5. Attacker motivations and profiles1.6. STRIDE threat modelling applied to IoT1.7. Risk analysis in connected products1.8. Security requirements by design1.9. CWE vulnerability taxonomy1.10. Case study: threat model of an IP camera
2.1. AES symmetric encryption and modes of operation2.2. Elliptic curve cryptography2.3. Hash functions and MAC codes2.4. Random number generation2.5. ASCON lightweight cryptography2.6. Cryptographic accelerators in microcontrollers2.7. Side-channel attacks: principles2.8. Secure key management2.9. Post-quantum cryptography for IoT2.10. Practical: ECDSA signing with mbedTLS on a microcontroller
3.1. Hardware root of trust3.2. Secure elements, TPM and SIM3.3. TrustZone trusted execution environments3.4. Protection of JTAG and SWD debug ports3.5. Physically unclonable functions3.6. Protection against physical tampering3.7. Fault injection: defensive framework3.8. Hardware supply chain security3.9. Assessment with PSA Certified3.10. Lab: configuring TrustZone-M on a Cortex-M33
4.1. Secure boot chain4.2. MCUboot and verified U-Boot bootloaders4.3. Image signing and encryption4.4. Rollback protection4.5. Secure OTA updates4.6. Firmware partitioning and isolation4.7. Memory protection with MPU4.8. Secure development in C and MISRA4.9. Static analysis of embedded code4.10. Practical: secure boot with MCUboot
5.1. TLS 1.3 and DTLS on constrained devices5.2. Mutual authentication with certificates5.3. Security in MQTT and CoAP5.4. OSCORE and EDHOC5.5. BLE security and pairing5.6. Security in Zigbee, Thread and Matter5.7. LoRaWAN security5.8. Security in cellular IoT networks5.9. Network segmentation for devices5.10. Lab: MQTT over TLS with mutual authentication
6.1. Unique device identity6.2. Public key infrastructure for IoT6.3. Secure factory provisioning6.4. Zero-touch enrolment6.5. Credential rotation and revocation6.6. Secure fleet management6.7. EST and SCEP protocols6.8. Credentials in eSIM and iSIM6.9. End of life and secure erasure6.10. Workshop: private PKI for a sensor fleet
7.1. Shared responsibility model7.2. Access policies on IoT platforms7.3. API protection7.4. Security of device twins7.5. Logging and auditing7.6. Detection of anomalous behaviour7.7. Security of edge containers7.8. Personal data protection7.9. Secure service configuration7.10. Practical: policy review in AWS IoT Core
8.1. IoT penetration testing methodology8.2. Firmware analysis with binwalk8.3. Firmware emulation8.4. Network traffic analysis8.5. Testing radio interfaces8.6. Testing companion mobile apps8.7. Review of default configuration8.8. Findings report and CVSS severity8.9. Responsible vulnerability disclosure8.10. Lab: firmware analysis in a controlled environment
9.1. Fleet security monitoring9.2. IoT intrusion detection systems9.3. Secure logging on devices9.4. Event correlation in SIEM9.5. Incident response on devices9.6. Forensic analysis of IoT devices9.7. Patch management at scale9.8. Threat intelligence9.9. Mandatory incident notification9.10. Case study: responding to a botnet in a fleet
10.1. ETSI EN 303 645 standard10.2. RED cybersecurity requirements10.3. Cyber Resilience Act obligations10.4. IEC 62443 series in industrial IoT10.5. NIST IR 8259 and device profile10.6. PSA and SESIP certification10.7. EUCC European certification scheme10.8. Security labelling programmes10.9. Manufacturer responsibility after sale10.10. Workshop: gap analysis against EN 303 645
11.1. Secure development maturity model11.2. Traceable security requirements11.3. Security-focused design review11.4. Software bill of materials (SBOM)11.5. Open-source dependency management11.6. Integrating security into CI/CD11.7. Firmware fuzz testing11.8. Vulnerability and CVE management11.9. Security support throughout the product's lifetime11.10. Practical: DevSecOps pipeline for firmware
12.1. Definition of the IoT product12.2. Threat and risk modelling12.3. Proposed security architecture12.4. Implementation of controls12.5. Security assessment of the prototype12.6. Regulatory compliance analysis12.7. Vulnerability management plan12.8. Conclusions on IoT security12.9. Master's Thesis report12.10. Master's Thesis: defence before a panel
How you'll learn
100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: you progress at your own pace within each intake, so the programme fits around your job.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is Wireshark, binwalk, Ghidra, MCUboot and OpenSSL, in free, academic or evaluation versions. Testing is studied through real procedures: firmware and traffic analysis on lab devices, implementing secure boot and TLS communications, and conformity assessment against ETSI EN 303 645. Assessment is continuous by module, plus the final Master's Thesis.
Standards covered: ETSI EN 303 645, Regulation (EU) 2024/2847, EN 18031-1, IEC 62443-4-2, NIST IR 8259A, ISO/IEC 27001, PSA Certified, OWASP ISVS.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- A university degree in engineering, science or architecture, or equivalent demonstrable professional experience.
- An internet connection and a computer capable of running the programme's software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with Wireshark, binwalk, Ghidra, MCUboot and OpenSSL, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.
A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme's software, and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
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