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Master'sElectronics, Embedded Systems & Telecom Applications open

Master’s in Precision Power Supply and Power Integrity Engineering

Online master's programme of 1,900 hours in precision power and power integrity engineering. 12 modules covering power architectures, low-noise linear regulators, switching converters, loop stability, power distribution networks, PI simulation, powering precision circuits and processors, measurement, digital power management and compliance with IEC 62368-1 and IPC-9592B, with an assigned technical tutor.

Duration1900 h
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

Design power architectures for demanding electronic systems.

02

Select linear and switching regulators according to noise, efficiency and precision.

03

Design power distribution networks with a target impedance.

04

Analyse the stability and transient response of regulators.

05

Minimise supply noise in sensitive analogue circuits.

06

Measure impedance, noise and transients with suitable techniques.

07

Integrate digital power management and telemetry.

Profile

Who it's for

  • Power integrity engineers designing PDNs for processors and FPGAs.
  • Power supply engineers working on regulators and converters.
  • Precision hardware engineers who need clean supplies for sensitive circuits.
  • Power management engineers working with PMBus and telemetry.
  • Instrumentation engineers designing low-noise measurement equipment.
  • Electrical validation engineers measuring rails, noise and transients.
  • Engineering or science graduates seeking to move into the data centre sector.
Standards & tools

What you'll work with

  • IEC 62368-1 (safety of audio/video and information technology equipment)
  • IPC-9592B (requirements for power conversion devices)
  • IEC 61000-3-2 (limits for harmonic current emissions)
  • CISPR 32 (emissions from multimedia equipment)
  • Intel VR13 and IMVP (voltage regulator design guidelines)
  • PMBus (Power System Management Protocol)
  • JEDEC JESD79-5 (DDR5 SDRAM)
  • IEC 60601-1 (safety of medical electrical equipment)
  • LTspice
  • SIMetrix/SIMPLIS
  • Ansys SIwave
  • Keysight PathWave ADS
  • MATLAB/Simulink
Syllabus

12 modules · 1900 h

  1. 1.1Power requirements of modern systems
  2. 1.2Intermediate bus architectures
  3. 1.3Point-of-load conversion
  4. 1.4Rail sequencing and start-up
  5. 1.5Power budget and efficiency
  6. 1.6Powering processors and FPGAs
  7. 1.7Powering precision circuits
  8. 1.8Isolation and electrical safety
  9. 1.9Trends in 48 V power delivery
  10. 1.10Case study: power tree of a processing board
  1. 2.1LDO regulator topologies
  2. 2.2Output noise and its spectrum
  3. 2.3Ripple rejection (PSRR) versus frequency
  4. 2.4Stability with ceramic capacitors
  5. 2.5Dissipation and thermal management
  6. 2.6Ultra-low-noise regulators
  7. 2.7Post-filtering of switching converters
  8. 2.8Precision voltage references
  9. 2.9Selection of linear regulators
  10. 2.10Practical: PSRR simulation of an LDO
  1. 3.1Buck, boost and buck-boost topologies
  2. 3.2Continuous and discontinuous conduction modes
  3. 3.3Voltage-mode and current-mode control
  4. 3.4Constant on-time control
  5. 3.5Selection of inductors and capacitors
  6. 3.6Losses and efficiency
  7. 3.7Interleaved multiphase converters
  8. 3.8Output ripple and its reduction
  9. 3.9GaN semiconductors for high frequency
  10. 3.10Lab: design of a buck converter in SIMPLIS
  1. 4.1Averaged small-signal models
  2. 4.2Loop transfer function
  3. 4.3Type II and type III compensation
  4. 4.4Phase and gain margin
  5. 4.5Loop measurement by injection
  6. 4.6Response to load steps
  7. 4.7Adaptive voltage positioning
  8. 4.8Digital control of regulators
  9. 4.9Interaction between filter and regulator
  10. 4.10Workshop: compensation of a multiphase regulator
  1. 5.1The target impedance concept
  2. 5.2Network model from regulator to die
  3. 5.3Decoupling capacitors and their ESL
  4. 5.4Anti-resonances between capacitors
  5. 5.5Inter-plane capacitance
  6. 5.6Package and on-die decoupling
  7. 5.7DC voltage drop
  8. 5.8Current density in planes and vias
  9. 5.9Optimising the number of capacitors
  10. 5.10Practical: design of a processor decoupling network
  1. 6.1Frequency-domain network simulation
  2. 6.2DC voltage drop simulation
  3. 6.3Time-domain noise analysis
  4. 6.4Load current models
  5. 6.5Signal and power co-simulation
  6. 6.6Board model extraction
  7. 6.7Coupled electrothermal analysis
  8. 6.8Correlation with measurements
  9. 6.9Design flow with SIwave
  10. 6.10Lab: voltage drop analysis on a board
  1. 7.1Requirements of converters and references
  2. 7.2Supply noise in data converters
  3. 7.3Powering low-noise amplifiers
  4. 7.4Powering oscillators and PLLs
  5. 7.5Separation of analogue and digital grounds
  6. 7.6Switching frequency and spurs
  7. 7.7Synchronisation of switching converters
  8. 7.8Ferrite filtering and saturation
  9. 7.9Powering remote sensors
  10. 7.10Case study: powering an 18-bit digitiser
  1. 8.1Regulator requirements for CPUs and GPUs
  2. 8.2Intel regulator design guidelines
  3. 8.3Powering DDR5 memory with a PMIC
  4. 8.448 V to point-of-load converters
  5. 8.5High-density power modules
  6. 8.6Vertical power delivery
  7. 8.7Light-load efficiency
  8. 8.8Response to artificial intelligence workloads
  9. 8.9Cooling of power stages
  10. 8.10Workshop: sizing a regulator for a GPU
  1. 9.1Measuring output ripple and noise
  2. 9.2High-sensitivity power rail probes
  3. 9.3Impedance measurement with a vector network analyser
  4. 9.4Two-port shunt method
  5. 9.5Transient response measurement
  6. 9.6Load step injectors
  7. 9.7PSRR measurement
  8. 9.8Efficiency measurement
  9. 9.9Common measurement errors
  10. 9.10Practical: impedance measurement of a power network
  1. 10.1PMBus and SVID protocols
  2. 10.2Voltage, current and temperature telemetry
  3. 10.3Adaptive voltage control
  4. 10.4Fault management and protection
  5. 10.5Sequencers and supervisors
  6. 10.6Coordinated thermal management
  7. 10.7Power event logging
  8. 10.8Configuration in production
  9. 10.9Power firmware security
  10. 10.10Workshop: PMBus configuration of a multiphase regulator
  1. 11.1Derating of power components
  2. 11.2Lifetime of electrolytic capacitors
  3. 11.3IPC-9592B requirements
  4. 11.4Electrical safety to IEC 62368-1
  5. 11.5Requirements for medical equipment
  6. 11.6Converter emissions and CISPR 32
  7. 11.7Mains harmonics, IEC 61000-3-2
  8. 11.8Fault protection
  9. 11.9Qualification testing
  10. 11.10Case study: reliability analysis of a power supply
  1. 12.1Definition of the power system
  2. 12.2Requirements specification
  3. 12.3Power architecture
  4. 12.4Regulator design
  5. 12.5Distribution network design
  6. 12.6Power integrity simulation
  7. 12.7Measurement plan
  8. 12.8Conclusions and future work
  9. 12.9Master's Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, so it fits around your job.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is LTspice, SIMetrix/SIMPLIS, Ansys SIwave, Keysight PathWave ADS and MATLAB/Simulink, in free, academic or evaluation versions. Work is based on real procedures: design and simulation of low-noise regulators, impedance measurement of power distribution networks and transient response analysis of multiphase regulators. Assessment is continuous per module, plus the final Master's Thesis.

Standards covered: IEC 62368-1, IPC-9592B, IEC 61000-3-2, CISPR 32, Intel VR13 and IMVP Voltage Regulator Design Guidelines, PMBus, JEDEC JESD79-5, IEC 60601-1.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of IEC 62368-1, IPC-9592B and IEC 61000-3-2 applied to real cases, not as a theoretical annex.
Industry software:LTspice, SIMetrix/SIMPLIS, Ansys SIwave, Keysight PathWave ADS and MATLAB/Simulink, in free, academic or evaluation versions.
Master's Thesis with defence:The design of a complete power system, from architecture and regulators to the distribution network, power integrity simulation and measurement plan, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Buck converter design
Design and simulate a buck converter in SIMPLIS.
Multiphase compensation
Compensate a multiphase regulator and verify its transient response.
Decoupling network
Design the decoupling network of a processor against a target impedance.
PDN impedance measurement
Measure the impedance of a power distribution network.
Master's Thesis
A complete power system design with PI simulation and measurement plan, defended before a panel.
Career opportunities

Where this takes you

Power integrity engineerPower supply engineerPrecision hardware engineerPower management engineerInstrumentation engineerElectrical validation engineer
Admissions & scholarships

Requirements

  • University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • Internet connection and a computer capable of running the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

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FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with LTspice, SIMetrix/SIMPLIS, Ansys SIwave, Keysight PathWave ADS and MATLAB/Simulink, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme software, and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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