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CourseRegulation, Safety, RAMS & Homologation Applications open

DO-254 Course for Aeronautical Hardware

Online 300-hour course in DO-254 for aeronautical hardware. 6 modules covering DO-254 (aeronautical electronic hardware), AC 20-152A (acceptance of DO-254) and Questa. Assigned tutor and open enrolment.

Duration300 h
ModeOnline
Start datesSet by the faculty
AwardSEIUM Institute certificate
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Learning outcomes

What you will be able to do

01

Explain the scope and DAL levels of DO-254.

02

Prepare the Plan for Hardware Aspects of Certification (PHAC).

03

Define FPGA and ASIC requirements and design with traceability.

04

Design functional verification and on-board testing strategies.

05

Evaluate the use of COTS components and third-party IP.

06

Manage the qualification of design and verification tools.

07

Prepare a DO-254 certification file.

Profile

Who it's for

  • FPGA design engineer wishing to specialise in DO-254 for aeronautical hardware.
  • Hardware verification engineer wishing to specialise in DO-254 for aeronautical hardware.
  • Hardware certification manager wishing to specialise in DO-254 for aeronautical hardware.
  • ASIC design engineer wishing to specialise in DO-254 for aeronautical hardware.
  • Aeronautical electronics engineer wishing to specialise in DO-254 for aeronautical hardware.
  • Design assurance specialist wishing to specialise in DO-254 for aeronautical hardware.
  • Graduates in engineering or science seeking to enter the aeronautical industry.
Standards & tools

What you'll work with

  • DO-254 (aeronautical electronic hardware)
  • AC 20-152A (acceptance of DO-254)
  • AMC 20-152A (EASA)
  • ARP4754A (aeronautical systems development)
  • ARP4761 (safety assessment)
  • DO-160G (environmental conditions)
  • IEEE 1076 (VHDL)
Syllabus

6 modules · 300 h

  1. 1.1Complex electronic hardware in avionics
  2. 1.2DO-254 and AC 20-152A
  3. 1.3EASA AMC 20-152A
  4. 1.4Simple versus complex hardware
  5. 1.5DAL design levels
  6. 1.6Relationship with ARP4754A
  7. 1.7Hardware life cycle
  8. 1.8Objectives of DO-254 Annex A
  9. 1.9Stages of authority involvement
  10. 1.10Case study: classification of a flight control FPGA
  1. 2.1Plan for Hardware Aspects of Certification (PHAC)
  2. 2.2Design, validation and verification plans
  3. 2.3Configuration management plan
  4. 2.4Process assurance plan
  5. 2.5Requirements and design standards
  6. 2.6VHDL and Verilog coding standards
  7. 2.7Phase transition criteria
  8. 2.8COTS component management
  9. 2.9FPGA supplier selection
  10. 2.10Workshop: drafting a PHAC
  1. 3.1Hardware requirements capture
  2. 3.2Derived requirements and their feedback to safety
  3. 3.3Conceptual and detailed design
  4. 3.4RTL description
  5. 3.5Synthesis, place and route
  6. 3.6Timing constraints
  7. 3.7Clock domains and metastability
  8. 3.8Design for reliability: SEU and TMR
  9. 3.9Third-party intellectual property (IP)
  10. 3.10Practice: designing a VHDL module with traced requirements
  1. 4.1Requirements and design reviews
  2. 4.2Functional simulation and test benches
  3. 4.3Requirements-based verification
  4. 4.4Item coverage at DAL A/B
  5. 4.5Static timing analysis
  6. 4.6On-board hardware testing
  7. 4.7Formal equivalence verification
  8. 4.8Independence analysis
  9. 4.9FFPA analysis of failure paths
  10. 4.10Laboratory: test bench with code coverage
  1. 5.1Tool evaluation and qualification
  2. 5.2Synthesis and simulation tools
  3. 5.3Use of COTS microprocessors
  4. 5.4In-service experience
  5. 5.5Obsolescence management
  6. 5.6Transition to production
  7. 5.7Acceptance tests
  8. 5.8Hardware changes and modifications
  9. 5.9Authority oversight
  10. 5.10Case study: COTS SoC in a DAL B system
  1. 6.1Hardware and DAL definition
  2. 6.2Preparation of the PHAC
  3. 6.3Hardware requirements
  4. 6.4Conceptual and detailed design
  5. 6.5Verification plan
  6. 6.6Coverage and traceability analysis
  7. 6.7Configuration management
  8. 6.8Hardware Accomplishment Summary (HAS)
  9. 6.9Report and presentation
  10. 6.10Final review with the tutor
Methodology, software & labs

How you'll learn

Fully 100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: students progress at their own pace within the intake, which makes it possible to combine study with work.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Questa, Vivado, Libero SoC, Riviera-PRO, IBM DOORS, in free, academic or evaluation versions. Tests are studied using real procedures for functional verification of FPGAs in simulation, board-level testing of programmable devices, and reviews of hardware requirements coverage. Assessment is continuous per module, plus the final integrating project.

Accreditable laboratories(EN ISO/IEC 17025) with a rotor test rig, EMC/Lightning pre-compliance, HIL/SIL, vibration/acoustics.
Evidence-driven final project:safety case, test plan, compliance dossier and operational limits.
Industry mentoring:instructors with experience in training, , eVTOL/UAM and flight test.
Flexible mode(hybrid/online), international cohorts and support from SEIUM Career Services.
Ethics and safety:a safety-by-design approach, with OT cybersecurity, DIH and compliance as its pillars.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Hardware and DAL Definition

Explain the scope and DAL levels of DO-254.

Preparation of the PHAC

Prepare the Plan for Hardware Aspects of Certification (PHAC).

Hardware Requirements

Define FPGA and ASIC requirements and design with traceability.

Conceptual and Detailed Design

Design functional verification and on-board testing strategies.

Verification Plan

Evaluate the use of COTS components and third-party IP.

Career opportunities

Where this takes you

FPGA Design EngineerHardware Verification EngineerHardware Certification ManagerASIC Design EngineerAeronautical Electronics EngineerDesign Assurance Specialist
Admissions & scholarships

Requirements

  • No prior degree is required.
  • Internet connection and a computer capable of running the programme's software.
  • Sufficient level of Spanish to follow technical regulatory texts.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

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FAQ

Frequently asked questions

The programme comprises 300 hours in total, spread over 3 to 5 months. That is between 10 and 15 hours per week on average, compatible with full-time work.

You will work with Questa, Vivado, Libero SoC, Riviera-PRO and IBM DOORS. Free, academic or evaluation versions are used, and the tutor indicates the free alternative where one exists.

A SEIUM own diploma upon passing the continuous assessment and the final integrating project. This is in-house training, not an official qualification from the Ministry.

Yes. Modules passed in a course or postgraduate diploma in the same area are credited towards the higher-level programme. Check the recognition policy when you enrol.

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