Diploma in FPGA/ASIC Safety-Critical and Avionics CEM
Online postgraduate diploma of 800 hours in safety-critical FPGA/ASIC and avionics EMC: 8 modules covering FPGA and ASIC technologies, safe programmable logic design, atmospheric radiation effects, advanced FPGA verification, electromagnetic compatibility, DO-160G environmental testing, and HIRF, lightning and certification, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Select FPGA and ASIC technologies suited to critical functions.
Apply safe design techniques in programmable logic.
Assess and mitigate atmospheric radiation effects on electronics.
Apply advanced verification and fault injection techniques.
Design avionics equipment to electromagnetic compatibility criteria.
Plan environmental and EMC testing according to DO-160G.
Justify HIRF and lightning protection for certification.
Who it's for
- FPGA designers working on avionics.
- ASIC engineers.
- Electromagnetic compatibility engineers.
- Environmental test engineers.
- Electronics reliability engineers.
- Equipment certification engineers.
- Engineering or science graduates looking to enter avionics.
What you'll work with
- RTCA DO-254 (design assurance guidance for airborne electronic hardware)
- RTCA DO-160G (environmental conditions and test procedures for airborne equipment)
- AMC 20-152A (EASA acceptable means of compliance for airborne electronic hardware)
- IEC 62396-1 (atmospheric radiation effects on avionics electronics)
- CS 25.1317 (HIRF protection)
- SAE ARP5412 (aircraft lightning environment)
- SAE ARP5413 (certification of aircraft electrical/electronic systems for indirect effects of lightning)
- SAE ARP5414 (aircraft lightning zoning)
- AMD Vivado
- Microchip Libero SoC
- Siemens Questa
- Ansys HFSS
- CST Studio Suite
8 modules
1.1SRAM, flash and antifuse FPGAs1.2ASIC versus FPGA: cost and certification1.3Radiation-tolerant families1.4SoC FPGAs with embedded processors1.5ASIC design flow1.6IP cores and their acceptance1.7Packages and reliability1.8Obsolescence and life cycle1.9Technology selection criteria1.10Workshop: comparing devices for a flight controller
2.1Safe state machines2.2Robust reset strategies2.3Multiple clock domains2.4Triple modular redundancy2.5EDAC and ECC codes2.6Watchdogs and monitors2.7Partitioning critical functions2.8Deterministic design2.9HDL code reviews2.10Practical: implementing TMR in VHDL
3.1Atmospheric neutrons and altitude3.2SEU, MBU and SEFI3.3Error rates according to IEC 623963.4Configuration memory scrubbing3.5Neutron beam testing3.6Mitigation in memories3.7System-level impact3.8Safety margins3.9Manufacturer reliability data3.10Lab: estimating the SEU rate of a design
4.1Formal verification and equivalence checking4.2Functional coverage with UVM4.3Testing on the target hardware4.4Fault injection4.5Static timing analysis4.6Power analysis4.7Post-synthesis simulation4.8Assessed tools4.9Verification traceability4.10Practical: fault injection in simulation
5.1On-board sources of interference5.2Conducted and radiated coupling5.3Screening and shielding5.4Grounding and bonding5.5Power supply filtering5.6PCB design for EMC5.7Wiring and harnesses5.8Crosstalk5.9Electromagnetic simulation5.10Workshop: EMC review of a PCB
6.1Structure of DO-160G6.2Power input and voltage spikes6.3Conducted and radiated susceptibility6.4Radio-frequency emission6.5Induced lightning susceptibility6.6Direct effects of lightning6.7Electrostatic discharge6.8Equipment categories6.9Preparing the laboratory6.10Case study: DO-160G test plan
7.1HIRF environment and requirements7.2HIRF test levels7.3Lightning environment according to ARP54127.4Certification for indirect effects7.5Lightning zoning7.6Similarity analysis7.7Means of compliance7.8Maintaining protection7.9Integration into the certification plan7.10Case study: HIRF justification for a unit
8.1Functional and environmental requirements8.2Device selection8.3Mitigation architecture8.4Verification and injected faults8.5EMC design of the board8.6DO-160G test plan8.7Certification justification8.8Conclusions8.9Report and presentation8.10Final project: final review with the tutor
How you'll learn
Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within each intake, so the programme fits around your job.
Each module combines theory, guided reading of the original standards and applied exercises. The working software is AMD Vivado, Microchip Libero SoC, Siemens Questa, Ansys HFSS and CST Studio Suite, in free, academic or evaluation versions. Real procedures are studied: EMC testing according to DO-160G, estimation of SEU rates in programmable logic and fault injection in FPGA simulation. Assessment is continuous by module, plus the final project.
Standards covered: RTCA DO-254, RTCA DO-160G, AMC 20-152A, IEC 62396-1, CS 25.1317, SAE ARP5412, SAE ARP5413, SAE ARP5414.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- Prior technical training or professional experience in the sector. No university degree is required.
- An internet connection and a computer capable of running the programme software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 800 hours over 6–8 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with AMD Vivado, Microchip Libero SoC, Siemens Questa, Ansys HFSS and CST Studio Suite, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the final project. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed are recognised in a higher programme in the same area (postgraduate diploma or master's). Ask about the recognition policy when you enrol.
Prior technical training or professional experience in the sector (no university degree required), a computer able to run the software, and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
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