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Postgraduate Diploma in Design for Compliance and Pre-tests

Online Postgraduate Diploma in Design for Compliance and Pre-tests, 800 h. 8 modules covering CISPR 32, CISPR 35 and Ansys SIwave. Assigned tutor and open enrolment.

Duration800 h
ModeOnline
AwardSEIUM Institute diploma
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Learning outcomes

What you will be able to do

01

Understand the physical mechanisms of electromagnetic interference.

02

Design PCBs with appropriate return paths and decoupling.

03

Select filters, shielding and protection devices.

04

Apply the immunity tests of the IEC 61000-4 series.

05

Carry out emissions pre-tests using basic instrumentation.

06

Diagnose and correct electromagnetic compatibility faults.

07

Plan compliance from the earliest design stages.

Profile

Who it's for

  • EMC engineer looking to specialise in Design for Compliance and Pre-tests.
  • PCB designer looking to specialise in Design for Compliance and Pre-tests.
  • Hardware engineer looking to specialise in Design for Compliance and Pre-tests.
  • Pre-compliance laboratory technician looking to specialise in Design for Compliance and Pre-tests.
  • Product compliance engineer looking to specialise in Design for Compliance and Pre-tests.
  • Power supply engineer looking to specialise in Design for Compliance and Pre-tests.
  • Graduates in engineering or sciences seeking to enter the consumer electronics sector.
Standards & tools

What you'll work with

  • CISPR 32
  • CISPR 35
  • IEC 61000-4-2
  • IEC 61000-4-4
  • IEC 61000-4-5
  • IEC 61000-4-3
  • CISPR 16-1-1
  • IEC 61000-3-2
Syllabus

8 modules · 800 h

  1. 1.1Sources, paths and victims
  2. 1.2Conducted and radiated emissions
  3. 1.3Common mode and differential mode
  4. 1.4Digital signal spectrum
  5. 1.5Capacitive and inductive coupling
  6. 1.6Unintentional antennas in cables and tracks
  7. 1.7Return impedance and loops
  8. 1.8Skin effect and parasitics
  9. 1.9CISPR 32 limits by class
  10. 1.10Practical: spectrum of a digital clock
  1. 2.1Layer stack-up and planes
  2. 2.2Current return paths
  3. 2.3Decoupling and distributed capacitance
  4. 2.4Routing of high-speed signals
  5. 2.5Partitioning of analogue and digital zones
  6. 2.6Plane splits and slots
  7. 2.7Stitching vias and board edges
  8. 2.8Power integrity
  9. 2.9Design rules and reviews
  10. 2.10Laboratory: return simulation in SIwave
  1. 3.1Mains and common-mode filters
  2. 3.2Ferrites and their selection
  3. 3.3Enclosure shielding
  4. 3.4Apertures and conductive gaskets
  5. 3.5Shielded cables and termination
  6. 3.6Chassis and earth connections
  7. 3.7Interface suppression
  8. 3.8Design of quiet switched-mode power supplies
  9. 3.9Spread-spectrum clocking
  10. 3.10Workshop: mains input filter design
  1. 4.1Electrostatic discharge IEC 61000-4-2
  2. 4.2Radiated immunity IEC 61000-4-3
  3. 4.3Electrical fast transients IEC 61000-4-4
  4. 4.4Surge IEC 61000-4-5
  5. 4.5Conducted immunity IEC 61000-4-6
  6. 4.6Voltage dips IEC 61000-4-11
  7. 4.7TVS diodes and varistors
  8. 4.8Performance criteria A, B and C
  9. 4.9Robust firmware against disturbances
  10. 4.10Case study: ESD protection of a USB port
  1. 5.1Pre-compliance laboratory
  2. 5.2Spectrum analysers and receivers
  3. 5.3Peak, quasi-peak and average detectors
  4. 5.4LISNs for conducted emissions
  5. 5.5Near-field probes
  6. 5.6Radiated measurements in GTEM cells
  7. 5.7Correlation with an accredited laboratory
  8. 5.8Uncertainty according to CISPR 16-4-2
  9. 5.9Locating emission sources
  10. 5.10Laboratory: conducted emissions with LISN
  1. 6.1ESD guns and procedures
  2. 6.2EFT and surge generators
  3. 6.3Current injection on cables
  4. 6.4Table-top and floor-standing setups
  5. 6.5Monitoring of the equipment under test
  6. 6.6Failure logging and criteria
  7. 6.7Preliminary electrical safety tests
  8. 6.8Organisation of the in-house test bench
  9. 6.9Personnel safety during testing
  10. 6.10Practical: contact and air ESD test
  1. 7.1Diagnosis of emission faults
  2. 7.2Diagnosis of immunity faults
  3. 7.3Quick and permanent fixes
  4. 7.4EMC simulation at the design stage
  5. 7.5Compliance-oriented design reviews
  6. 7.6Planning of official tests
  7. 7.7Cost and schedule management
  8. 7.8Documentation of results
  9. 7.9Lessons learned per project
  10. 7.10Case study: correction of a radiated fault
  1. 8.1Product and applicable standards
  2. 8.2EMC risk analysis of the design
  3. 8.3PCB and enclosure design measures
  4. 8.4Pre-test plan
  5. 8.5Execution of pre-tests
  6. 8.6Analysis and corrections
  7. 8.7Prediction of official results
  8. 8.8Design checklist
  9. 8.9Report and presentation
  10. 8.10Final review with the tutor
Methodology, software & labs

How you'll learn

Training 100 % online on the SEIUM Institute campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: students progress at their own pace within the enrolment period, making it compatible with work.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Ansys SIwave, CST Studio Suite, LTspice, Rohde & Schwarz ELEKTRA, Altium Designer, in free, academic or evaluation versions. Tests are studied using real conducted emissions procedures with LISN, contact and air ESD tests, and exploration with near-field probes. Assessment is continuous per module plus the final integrative project.

Accreditable laboratories(EN ISO/IEC 17025) with rotor bench, EMC/Lightning pre-compliance, HIL/SIL, vibration/acoustics.
Evidence-driven final project:safety case, test plan, compliance dossier and operational limits.
Industry mentorship:lecturers with experience in training, , eVTOL/UAM and flight test.
Flexible format(hybrid/online), international cohorts and support from SEIUM Career Services.
Ethics and safety:safety-by-design approach, cyber-OT, DIH and compliance as core pillars.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Product and applicable standards

Understand the physical mechanisms of electromagnetic interference.

EMC risk analysis of the design

Design PCBs with appropriate return paths and decoupling.

PCB and enclosure design measures

Select filters, shielding and protection devices.

Pre-test plan

Apply the immunity tests of the IEC 61000-4 series.

Execution of pre-tests

Carry out emissions pre-tests using basic instrumentation.

Career opportunities

Where this takes you

EMC EngineerPCB DesignerHardware EngineerPre-compliance Laboratory TechnicianProduct Compliance EngineerPower Supply Engineer
Admissions & scholarships

Requirements

  • Prior technical training or professional experience in the sector. No university degree is required.
  • Internet connection and a computer capable of running the programme's software.
  • Sufficient level of Spanish to follow the reading of technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

FAQ

Frequently asked questions

The programme comprises 800 hours in total, spread over 6 to 8 months. That is between 10 and 15 hours per week on average, compatible with a full-time job.

You will work with Ansys SIwave, CST Studio Suite, LTspice, Rohde & Schwarz ELEKTRA, Altium Designer. Free, academic or evaluation versions are used, and the tutor indicates the free alternative where one exists.

An own diploma from SEIUM Institute upon passing the continuous assessment and the final integrative project. It is in-house training, not an official Ministry qualification.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Check the recognition policy when enrolling.

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