Master’s in Reliability, Derating and Design for Manufacture Engineering
Online master's programme of 1,900 hours in reliability, derating and design for manufacturing engineering. 12 modules covering reliability statistics and prediction, component derating to ECSS-Q-ST-30-11C, FMEA to IEC 60812, physics of failure, accelerated testing, DFM/DFA, design for test, supply chain and field reliability, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Apply statistical reliability models to electronic products.
Define and verify component derating rules.
Carry out FMEA, FMEDA and fault tree analyses.
Design accelerated life tests and analyse their results.
Apply design for manufacturing, assembly and test principles.
Manage component obsolescence and quality.
Use field data to improve product reliability.
Who it's for
- Reliability engineers working with prediction, testing and field data.
- Component engineers responsible for selection, derating and obsolescence.
- Industrialisation engineers taking products from design to production.
- Product quality engineers handling returns and root-cause analysis.
- Design-for-manufacturing engineers working with contract manufacturers.
- Failure analysis engineers investigating physical failure mechanisms.
- Engineering or science graduates seeking to move into the aerospace sector.
What you'll work with
- IEC 61709 (reference conditions for failure rates)
- ECSS-Q-ST-30-11C (derating of EEE components)
- IEC 60812 (failure mode and effects analysis, FMEA)
- MIL-HDBK-217F (reliability prediction of electronic equipment)
- IPC-A-610H (acceptability of electronic assemblies)
- IEC 61649 (Weibull analysis)
- IEC 61124 (reliability compliance testing)
- JEDEC JEP122 (failure mechanisms and models for semiconductor devices)
- Ansys Sherlock
- ReliaSoft Weibull++
- Isograph Reliability Workbench
- Minitab
- Altium Designer
12 modules · 1900 h
1.1Reliability, maintainability and availability1.2Product reliability programme1.3Reliability requirements and their allocation1.4Bathtub curve and infant mortality1.5Survival and hazard functions1.6MTBF, MTTF and FIT metrics1.7Reliability in the development cycle1.8Life-cycle cost1.9Reliability culture in the organisation1.10Case study: reliability requirements for industrial equipment
2.1Exponential distribution and constant rate2.2Weibull distribution and its parameters2.3Lognormal distribution in wear-out mechanisms2.4Maximum likelihood estimation2.5Handling censored data2.6Confidence intervals2.7Probability plots2.8Comparing populations2.9Analysis with Weibull++2.10Practical: Weibull analysis of life data
3.1Parts-count prediction methods3.2Component stress analysis3.3MIL-HDBK-217F and its limitations3.4IEC 61709 and application factors3.5FIDES prediction methodology3.6Physics-of-failure models3.7Mission profiles and usage cycles3.8Reliability block diagrams3.9Reliability of redundant systems3.10Lab: reliability prediction with Reliability Workbench
4.1Concept and objectives of derating4.2Voltage, current and power derating4.3Thermal derating and junction temperature4.4ECSS-Q-ST-30-11C rules4.5Derating of semiconductors4.6Derating of capacitors4.7Derating of resistors and magnetics4.8Derating of connectors and cables4.9Verification of derating in the design4.10Workshop: derating analysis of a power supply
5.1Design FMEA to IEC 608125.2Process FMEA5.3FMEDA for functional safety5.4Fault trees5.5Worst-case circuit analysis5.6Sneak circuit analysis5.7Risk priority and action plans5.8Integration with requirements5.9Analysis tools5.10Case study: FMEDA of an input module
6.1Thermal fatigue of solder joints6.2Vibration and mechanical fatigue6.3Electromigration in semiconductors6.4Gate dielectric breakdown6.5Corrosion and electrochemical migration6.6Flex cracking in ceramic capacitors6.7Degradation of electrolytic capacitors6.8Mechanisms according to JEDEC JEP1226.9Life simulation with Sherlock6.10Practical: solder joint life estimation
7.1Arrhenius acceleration models7.2Coffin-Manson and Peck models7.3HALT limit testing7.4HASS screening in production7.5Quantitative accelerated life testing7.6Designing test plans7.7IEC 61124 demonstration tests7.8Burn-in and its justification7.9Analysis of test results7.10Lab: accelerated life test plan
8.1DFM principles in electronics8.2DFA principles8.3Package selection8.4Placement rules for soldering8.5Panelisation and depaneling8.6Design for automated inspection8.7Design for in-circuit test8.8IPC-A-610H criteria8.9Collaboration with the manufacturer8.10Workshop: DFM review of a design
9.1Production test strategy9.2In-circuit testing with a bed of nails9.3Flying probe testing9.4Boundary scan, IEEE 1149.19.5End-of-line functional testing9.6Coverage of manufacturing defects9.7In-line device programming9.8Statistical process control in production9.9Unit and batch traceability9.10Workshop: test strategy for a board
10.1Component selection and qualification10.2Preferred parts lists10.3Obsolescence management10.4Counterfeit components and their prevention10.5Qualification of alternative manufacturers10.6Moisture sensitivity and storage10.7Components for automotive and space10.8Supplier audits10.9Manufacturer change management10.10Case study: obsolescence management plan
11.1Field data collection11.2Returns analysis11.3FRACAS failure reporting system11.4Root cause analysis11.5Reliability growth11.6Warranty analysis11.7Feedback to design11.8Field quality indicators11.9Lessons learned register11.10Practical: warranty data analysis
12.1Selection of the product under study12.2Reliability requirements12.3Reliability prediction12.4Derating analysis12.5Failure mode analysis12.6DFM and DFA review12.7Accelerated test plan12.8Conclusions and recommendations12.9Master's Thesis report12.10Master's Thesis: defence before a panel
How you'll learn
Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, so it fits around your job.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is Ansys Sherlock, ReliaSoft Weibull++, Isograph Reliability Workbench, Minitab and Altium Designer, in free, academic or evaluation versions. Work is based on real procedures: derating analysis of a board's components, accelerated life testing with Weibull analysis, and DFM and DFA review of an electronic assembly. Assessment is continuous per module, plus the final Master's Thesis.
Standards covered: IEC 61709, ECSS-Q-ST-30-11C, IEC 60812, MIL-HDBK-217F, IPC-A-610H, IEC 61649, IEC 61124, JEDEC JEP122.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
- Internet connection and a computer capable of running the programme software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with Ansys Sherlock, ReliaSoft Weibull++, Isograph Reliability Workbench, Minitab and Altium Designer, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.
A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme software, and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
Related programmes
Master’s in High-Speed PCB Design Engineering
Online master's programme of 1,900 hours in high-speed PCB design engineering. 12 modules covering transmission lines, materials and stack-ups, vias, crosstalk, DDR memory interfaces, multigigabit serial…
Master’s in Marine Electronics Engineering
Online master's programme of 1,900 hours in marine electronics engineering, structured in 12 modules covering the marine environment, equipment requirements and testing, ship electrical systems, electronic…
Master’s in End-to-End IoT Platforms Engineering
Online master's programme of 1,900 hours in end-to-end IoT platforms engineering, structured in 12 modules covering IoT solution architecture, connected device design, connectivity, messaging protocols, cloud…
More in Electronics, Embedded Systems & Telecom
All Electronics, Embedded Systems & Telecom programmes → · How to apply · Fees & financing · Scholarships