Master’s in High-Power Engineering for HPC
Online master's programme of 1,900 hours in high-power engineering for HPC: 12 modules covering HPC power architecture, processor voltage regulators, 48 V conversion, rack power supplies, power integrity, data centre electrical distribution, high-density cooling, energy management and sustainability, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this programme. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Analyse the power chain from the grid to the processor.
Design multiphase regulators and 48 V converters.
Assess the power integrity of on-board distribution networks.
Size the electrical distribution and backup of a data centre.
Select cooling solutions for high-density racks.
Apply energy management and sustainability strategies.
Develop a comprehensive HPC power system project.
Who it's for
- Data centre power engineers.
- Power integrity engineers.
- Voltage regulator designers.
- Critical electrical infrastructure engineers.
- Liquid cooling engineers working on high-density racks.
- Energy efficiency managers.
- Engineering or science graduates aiming to enter the data centre sector.
What you'll work with
- EN 50600-2-2 (data centre facilities: power distribution)
- ISO/IEC 30134-2 (data centre key performance indicators: power usage effectiveness (PUE))
- IEC 62040-3 (uninterruptible power systems: performance and test requirements)
- Regulation (EU) 2019/424 (ecodesign requirements for servers and data storage products)
- IEC 60364-1 (low-voltage electrical installations: fundamental principles)
- ANSI/TIA-942 (telecommunications infrastructure standard for data centres)
- ASHRAE TC 9.9 (thermal guidelines for data processing environments)
- IEC 62368-1 (safety of audio/video, information and communication technology equipment)
- PLECS
- Ansys SIwave
- Cadence Sigrity
- Keysight PathWave ADS
- 6SigmaDCX
12 modules · 1900 h
1.1Power consumption of CPUs, GPUs and accelerators1.2Power chain from rack to chip1.312 V versus 48 V distribution1.4Power density per rack1.5PUE metrics and energy efficiency1.6Load profiles of AI training1.7Electrical distribution topologies1.8N+1 and 2N redundancy1.9Data centre power roadmap1.10Case study: power budget of a GPU cluster
2.1Multiphase VRM regulators2.2Transient and load-line specifications2.3DrMOS power stages2.4PMBus digital controllers2.5Adaptive constant on-time control2.6Integrated voltage regulators2.7Vertical regulators under the package2.8Ripple and decoupling2.9Voltage and current telemetry2.10Lab: transient response of a VRM
3.1Intermediate bus converters3.2Fixed-ratio DCX converters3.3Hybrid switched-capacitor converters3.4Direct 48 V to point-of-load conversion3.5On-board fixed-ratio LLC3.6Two-stage Sigma converters3.7High-load efficiency3.8Low-profile magnetics3.9Integration on accelerator cards3.10Practical exercise: design of a 48 V/12 V converter
4.1CRPS server power supplies4.2Open Rack architecture and power shelf4.3Totem-pole PFC and LLC4.4Rectifiers with SiC and GaN4.5Rack backup batteries4.680 PLUS certification4.7Current sharing4.8Control and monitoring via PMBus4.9Hot swapping4.10Case study: 33 kW power shelf
5.1Power distribution network (PDN)5.2Target impedance calculation5.3Board, package and on-die decoupling5.4PDN resonances5.5IR drop and electromigration5.6PDN simulation5.7PDN impedance measurement5.8Simultaneous switching noise5.9Chip-package-board co-design5.10Workshop: impedance analysis of a PDN
6.1Medium-voltage supply connection6.2Transformers and low-voltage switchboards6.3Static and rotary UPS6.4PDUs and busways6.5380 V DC distribution6.6Generator sets and transfer switching6.7Protection selectivity6.8Power quality and harmonics6.9DCIM electrical monitoring6.10Practical exercise: single-line diagram for a 2 MW hall
7.1Heat dissipation of 1,000 W chips7.2Direct-to-chip liquid cooling7.3Single-phase and two-phase immersion7.4Rear-door heat exchangers7.5CDUs and secondary loops7.6Water temperature and free cooling7.7Waste heat reuse7.8WUE water usage metric7.9Thermal design of the power electronics7.10Case study: liquid cooling of a 120 kW rack
8.1Power capping8.2Dynamic voltage and frequency scaling8.3GPU power management8.4Redfish and IPMI interfaces8.5Energy-aware workload scheduling8.6Load peaks and smoothing8.7Interaction with the power grid8.8Energy telemetry and analytics8.9Software-based efficiency optimisation8.10Workshop: power capping policy in a cluster
9.1Lithium-ion batteries in UPS9.2Supercapacitors for load peaks9.3Rack BBU systems9.4Battery management systems (BMS)9.5Autonomy and sizing9.6Thermal runaway safety9.7Backup fuel cells9.8Integration with renewables9.9Predictive battery maintenance9.10Practical exercise: BBU sizing for an AI rack
10.1Tier availability classification10.2Failure mode analysis10.3Mean time between failures10.4Concurrent maintenance without shutdown10.5Arc flash protection10.6Electrical safety of personnel10.7Load testing with resistive load banks10.8Integrated commissioning10.9Electrical incident management10.10Case study: failure analysis of a UPS system
11.1Energy efficiency in European data centres11.2Carbon footprint and emission scopes11.3Renewable energy procurement11.4Reporting of energy indicators11.5Server ecodesign11.6Circular economy for hardware11.7European Code of Conduct for Data Centres11.8Efficient building design11.9Total cost of ownership analysis11.10Workshop: energy sustainability report
12.1Definition of the HPC power system12.2Load and profile analysis12.3Conversion and distribution design12.4Electrical and thermal simulation12.5Cooling strategy12.6Efficiency and cost assessment12.7Reliability analysis12.8Conclusions and recommendations12.9Master's Thesis report12.10Master's Thesis: defence before a panel
How you'll learn
100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: you progress at your own pace within the intake, making it compatible with work.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is PLECS, Ansys SIwave, Cadence Sigrity, Keysight PathWave ADS and 6SigmaDCX, in free, academic or evaluation versions. Testing is studied through real procedures: transient measurement on multiphase regulators, impedance analysis of power distribution networks, and electrical and thermal sizing of high-density racks. Assessment is continuous by module, plus the final Master's Thesis.
Standards covered: EN 50600-2-2, ISO/IEC 30134-2, IEC 62040-3, Regulation (EU) 2019/424, IEC 60364-1, ANSI/TIA-942, ASHRAE TC 9.9, IEC 62368-1.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- A university degree in engineering, science or architecture, or equivalent demonstrable professional experience.
- An internet connection and a computer capable of running the programme's software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with PLECS, Ansys SIwave, Cadence Sigrity, Keysight PathWave ADS and 6SigmaDCX, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.
A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme's software and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
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