Master’s in Functional Safety in Electronics Engineering
Online master's programme of 1,900 hours in functional safety in electronics engineering, structured in 12 modules covering hazard and risk analysis, safety system architectures, hardware failure quantification, safety hardware and software design, ISO 26262, other sector standards, verification and validation, safety and cybersecurity, and certification, with an assigned technical tutor.
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What you will be able to do
Apply the functional safety lifecycle to electronic systems.
Carry out hazard analyses and allocate integrity levels.
Design fault-tolerant hardware architectures.
Quantify hardware failure metrics using FMEDA.
Develop safety software with appropriate rules and testing.
Apply sector standards for automotive, industry and railways.
Prepare a complete safety case for a real system.
Who it's for
- Functional safety engineers seeking a cross-sector command of IEC 61508 and ISO 26262.
- Product functional safety managers responsible for safety cases and assessments.
- Safety hardware engineers designing diagnostics and fault-tolerant boards.
- Safety-critical software engineers working with MISRA and MC/DC coverage.
- Functional safety assessors and auditors.
- Verification and validation engineers running HIL and fault injection campaigns.
- Engineering or science graduates aiming to work in the automotive sector.
What you'll work with
- IEC 61508 (functional safety of electrical/electronic/programmable systems)
- ISO 26262 (functional safety of road vehicles)
- IEC 61511 (safety instrumented systems for the process industry)
- ISO 13849-1 (safety-related parts of machinery control systems)
- IEC 62061 (functional safety of machinery control systems)
- EN 50128 (software for railway control and protection systems)
- ISO 21448 (safety of the intended functionality, SOTIF)
- ISO/SAE 21434 (road vehicle cybersecurity engineering)
- Ansys medini analyze
- Isograph Reliability Workbench
- LDRA Testbed
- Polyspace
- VectorCAST
12 modules · 1900 h
1.1Risk, hazard and harm1.2Tolerable risk and the ALARP principle1.3Safety functions and safe state1.4Random and systematic failures1.5Overall safety lifecycle1.6Functional safety management1.7Staff competence1.8Independence in assessment1.9Generic and sector standards1.10Case study: defining safety functions
2.1Hazard identification with HAZOP2.2Preliminary hazard analysis2.3Risk graph2.4Layer of protection analysis (LOPA)2.5SIL allocation2.6HARA in automotive and ASIL2.7System safety requirements2.8Documenting the analysis2.9Review with domain experts2.10Workshop: HARA of a power steering system
3.11oo1, 1oo2 and 2oo3 architectures3.2Hardware fault tolerance3.3Safe failure fraction3.4Diagnostic coverage3.5Common cause failures and beta factor3.6Diversity and redundancy3.7Watchdogs and supervision3.8Safe communication with the black channel3.9Lockstep microcontroller architectures3.10Practical: architecture selection for SIL 3
4.1Component failure rates4.2SN 29500 and IEC 61709 databases4.3FMEDA failure mode analysis4.4PFDavg and PFH calculation4.5Automotive SPFM and LFM metrics4.6Proof test intervals4.7Markov models4.8RBD models of safety systems4.9Calculation tools4.10Lab: FMEDA of an input board
5.1Component selection5.2Design of safe inputs and outputs5.3Power supply monitoring5.4RAM and Flash memory diagnostics5.5CPU tests at start-up and at runtime5.6Safety-certified microcontrollers5.7Design for testability and diagnostics5.8Electromagnetic compatibility and safety5.9Hardware design review5.10Practical: self-diagnosis of a digital output
6.1Safety software requirements6.2Safe languages and subsets6.3MISRA C rules6.4Defensive programming techniques6.5Software architecture and partitioning6.6Certified operating systems6.7Static analysis and metrics6.8Unit testing and MC/DC coverage6.9Use of qualified tools6.10Workshop: MISRA analysis of a C module
7.1Parts of ISO 262627.2Functional safety concept7.3Technical safety concept7.4ASIL decomposition7.5Development at hardware level7.6Development at software level7.7Safety elements out of context7.8Development interface agreement7.9Safety of the intended functionality (SOTIF)7.10Case study: technical concept for an electronic brake
8.1Process industries with IEC 615118.2Machinery with ISO 13849 and IEC 620618.3Railways with EN 50126 and EN 501288.4Avionics with DO-254 and DO-178C8.5Medical equipment with IEC 606018.6Lifts and personal safety8.7Nuclear energy: general framework8.8Comparison of requirements across sectors8.9Cross-certification between standards8.10Practical: PL calculation according to ISO 13849
9.1Verification planning9.2Reviews and inspections9.3Hardware-software integration testing9.4Fault injection9.5Testing on hardware-in-the-loop benches9.6Validation of the complete system9.7Anomaly management9.8Requirements traceability9.9Validation report9.10Lab: fault injection campaign
10.1Interaction between safety and security10.2ISO/SAE 2143410.3IEC 62443 series and functional safety10.4Combined threat and hazard analysis10.5Protection of safe communication channels10.6Updates and their impact on safety10.7Artificial intelligence and functional safety10.8The new ISO/PAS 880010.9Challenges of autonomous systems10.10Workshop: joint HARA and TARA analysis
11.1Safety case and GSN argumentation11.2Functional safety assessment11.3Process audits11.4Certification bodies11.5Certification of components and tools11.6Configuration management11.7Change and modification management11.8Safety in operation and maintenance11.9System decommissioning11.10Case study: safety case in GSN notation
12.1Definition of the system and its context12.2Hazard and risk analysis12.3Safety requirements and architecture12.4Quantitative failure analysis12.5Diagnostics design12.6Verification and validation plan12.7Safety case argumentation12.8Conclusions on functional safety12.9Master's Thesis report12.10Master's Thesis: defence before a panel
How you'll learn
100% online training on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. No fixed timetables: you progress at your own pace within each intake, so the programme fits around your job.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is Ansys medini analyze, Isograph Reliability Workbench, LDRA Testbed, Polyspace and VectorCAST, in free, academic or evaluation versions. Testing is studied through real procedures: FMEDA of electronic boards, fault injection campaigns on HIL benches, and preparing safety cases in GSN notation. Assessment is continuous by module, plus the final Master's Thesis.
Standards covered: IEC 61508, ISO 26262, IEC 61511, ISO 13849-1, IEC 62061, EN 50128, ISO 21448, ISO/SAE 21434.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- A university degree in engineering, science or architecture, or equivalent demonstrable professional experience.
- An internet connection and a computer capable of running the programme's software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You work with Ansys medini analyze, Isograph Reliability Workbench, LDRA Testbed, Polyspace and VectorCAST, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.
A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme's software, and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
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