Master'sRobotics, Automation & Control Applications open

Master’s in EtherCAT Engineering

Online master's programme of 1,900 hours in EtherCAT engineering, structured in 12 modules covering EtherCAT principles, slave architecture, distributed clocks, communication profiles, masters, motion control, FSoE functional safety, gateways, network diagnostics and device development, with an assigned technical tutor.

Duration1900 h
ModeOnline
LanguageEnglish
Start datesSet by the faculty
AwardSEIUM Institute diploma
Virtual lab · try it before you enrol

Take the controls.

Run a real engineering trade-off from this programme. Move the sliders, watch the model react in real time and beat the challenge.

SIM · LIVE ●
Learning outcomes

What you will be able to do

01

Understand how EtherCAT works and its on-the-fly processing.

02

Configure EtherCAT slaves and masters.

03

Apply distributed clocks for synchronisation.

04

Configure drives with the CiA 402 profile.

05

Implement functional safety with FSoE.

06

Diagnose faults in EtherCAT networks.

07

Develop devices that conform to the specification.

Profile

Who it's for

  • Fieldbus engineers who want to master EtherCAT in depth.
  • Motion control engineers working with synchronised multi-axis systems.
  • Industrial firmware developers building EtherCAT slaves.
  • Machine integrators commissioning EtherCAT-based machinery.
  • Network diagnostics specialists troubleshooting industrial Ethernet.
  • EtherCAT device designers preparing products for conformance.
  • Engineering or science graduates seeking to enter machinery manufacturing.
Standards & tools

What you'll work with

  • IEC 61158-3-12 (EtherCAT data-link layer service definition)
  • IEC 61784-2 (real-time Ethernet communication profiles)
  • IEC 61784-3-12 (functional safety communication profile, Safety over EtherCAT)
  • IEC 61800-7-201:2015 (drive profile type 1, CiA 402)
  • IEC 61800-5-2:2016 (functional safety of adjustable speed drives)
  • ETG.1000 (EtherCAT Technology Group specification)
  • ISO 13849-1:2023 (safety-related parts of control systems)
  • Beckhoff TwinCAT 3
  • CODESYS
  • SOEM
  • Wireshark
  • EtherCAT Conformance Test Tool
Syllabus

12 modules · 1900 h

  1. 1.1On-the-fly frame processing
  2. 1.2Comparison with other Ethernet fieldbuses
  3. 1.3Line, tree and ring topologies
  4. 1.4100BASE-TX and E-Bus physical layer
  5. 1.5Master and slaves
  6. 1.6Telegrams and datagrams
  7. 1.7Logical addressing and FMMU
  8. 1.8ETG and the IEC 61158 specification
  9. 1.9Application scope of EtherCAT
  10. 1.10Practical exercise: capturing EtherCAT frames
  1. 2.1ESC slave controllers
  2. 2.2Process memory and Sync Managers
  3. 2.3ESM state machine
  4. 2.4Mailbox and acyclic communication
  5. 2.5ESI description files
  6. 2.6EEPROM and SII
  7. 2.7Microcontrollers with integrated ESC
  8. 2.8SSC slave stacks
  9. 2.9Hardware design of a slave
  10. 2.10Lab: slave configuration with SSC
  1. 3.1DC distributed clocks
  2. 3.2Calculating propagation delays
  3. 3.3SYNC0 and SYNC1 signals
  4. 3.4Synchronisation accuracy
  5. 3.5Free run and SM-synchronous modes
  6. 3.6Jitter and its measurement
  7. 3.7Synchronisation with external time
  8. 3.8Applications in motion control
  9. 3.9Diagnosing DC errors
  10. 3.10Practical exercise: measuring jitter with an oscilloscope
  1. 4.1CANopen over EtherCAT (CoE)
  2. 4.2Servo Drive Profile (SoE)
  3. 4.3File Access over EtherCAT
  4. 4.4Ethernet over EtherCAT
  5. 4.5CiA 402 drive profile
  6. 4.6CSP, CSV and CST modes
  7. 4.7Configurable PDO mapping
  8. 4.8SDO objects and the object dictionary
  9. 4.9ETG device profiles
  10. 4.10Workshop: configuring a CiA 402 servo drive
  1. 5.1Master functions
  2. 5.2Masters in TwinCAT
  3. 5.3Masters in CODESYS
  4. 5.4Open-source masters SOEM and IgH
  5. 5.5Real-time Linux masters
  6. 5.6ENI configuration files
  7. 5.7Start-up and network scanning
  8. 5.8Hot Connect and optional groups
  9. 5.9Cable redundancy
  10. 5.10Lab: SOEM master on Linux
  1. 6.1Centralised control architecture
  2. 6.2Position loops in the master
  3. 6.3Multi-axis interpolation
  4. 6.4Robot kinematics
  5. 6.5Electronic cams and gearing
  6. 6.6250-microsecond cycles
  7. 6.7Integration with servo motors
  8. 6.8Drive tuning
  9. 6.9Machine examples
  10. 6.10Practical exercise: synchronised control of two axes
  1. 7.1The black channel principle
  2. 7.2Safety over EtherCAT
  3. 7.3IEC 61784-3 standards
  4. 7.4TwinSAFE safety logic
  5. 7.5Safe I/O devices
  6. 7.6Safety functions in drives
  7. 7.7Validation of safety projects
  8. 7.8PFH calculation
  9. 7.9Integration into machines
  10. 7.10Case study: STO safe stop on a servo drive
  1. 8.1EtherCAT to Profinet gateways
  2. 8.2EtherCAT to EtherNet/IP
  3. 8.3IO-Link integration
  4. 8.4EtherCAT Automation Protocol
  5. 8.5EtherCAT G and G10
  6. 8.6Connection with OPC UA
  7. 8.7Integration with third-party PLCs
  8. 8.8Communication with vision systems
  9. 8.9Mixed networks in machines
  10. 8.10Workshop: gateway to an external PLC
  1. 9.1CRC error counters
  2. 9.2Lost link and link errors
  3. 9.3Diagnostic tools
  4. 9.4Analysis with Wireshark
  5. 9.5Topology and fault location
  6. 9.6Cabling quality
  7. 9.7Interference and EMC
  8. 9.8Maintenance procedures
  9. 9.9Event logging
  10. 9.10Practical exercise: locating a cable fault
  1. 10.1Selecting the ESC and microcontroller
  2. 10.2PCB and magnetics design
  3. 10.3Slave firmware
  4. 10.4ESI generation
  5. 10.5CTT conformance testing
  6. 10.6ETG plugfests
  7. 10.7Device certification
  8. 10.8Product documentation
  9. 10.9Product life cycle
  10. 10.10Case study: designing an I/O module
  1. 11.1Packaging machines
  2. 11.2Industrial robots with EtherCAT
  3. 11.3Semiconductor manufacturing equipment
  4. 11.4CNC machine tools
  5. 11.5Test benches
  6. 11.6Energy and substations
  7. 11.7Medical and diagnostic equipment
  8. 11.8Entertainment and stage technology
  9. 11.9Performance compared with other fieldbuses
  10. 11.10Case study: high-speed test bench
  1. 12.1Requirements of the machine or test bench
  2. 12.2EtherCAT network design
  3. 12.3Master configuration
  4. 12.4Drive integration
  5. 12.5FSoE safety functions
  6. 12.6Synchronisation testing
  7. 12.7Performance analysis
  8. 12.8Conclusions and improvements
  9. 12.9Master's Thesis report
  10. 12.10Master's Thesis: defence before a panel
Methodology, software & labs

How you'll learn

Training is 100% online on the SEIUM campus, with downloadable material, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within the intake, so it is compatible with full-time work.

Each module combines theory, guided reading of the original standard and applied exercises. The working software is Beckhoff TwinCAT 3, CODESYS, SOEM, Wireshark and the EtherCAT Conformance Test Tool, in free, academic or evaluation versions. Exercises are based on real procedures for configuring EtherCAT networks with servo drives, measuring synchronisation with distributed clocks and diagnosing communication faults. Assessment is continuous by module, plus the final Master's Thesis.

Standards covered: IEC 61158-3-12, IEC 61784-2, IEC 61784-3-12, IEC 61800-7-201:2015, IEC 61800-5-2:2016, ETG.1000, ISO 13849-1:2023.

Assigned technical tutor:every module ends with a deliverable that your tutor marks individually.
Standards-based learning:guided reading of IEC 61158, IEC 61784 and IEC 61800-7 applied to real cases, not as a theoretical annex.
Industry software:Beckhoff TwinCAT 3, CODESYS, SOEM, Wireshark and EtherCAT Conformance Test Tool, in free, academic or evaluation versions.
Master's Thesis with defence:An EtherCAT network design and integration for a machine or test bench, defended before a panel.
Flexible format:100% online, no fixed timetables, compatible with full-time work.
Capstone project

Build it end to end

Your final project follows the real engineering workflow, step by step, reviewed by your tutor.

Define machine requirements
Specify the requirements of the machine or test bench to be networked.
Design the EtherCAT network
Lay out topology, slaves and the master configuration with ENI files.
Integrate the drives
Configure servo drives with CiA 402 and synchronise axes with distributed clocks.
Add FSoE safety functions
Implement and validate safety functions such as STO over Safety over EtherCAT.
Master's Thesis
An EtherCAT network design and integration for a machine or test bench, defended before a panel.
Career opportunities

Where this takes you

Fieldbus engineerMotion control engineerIndustrial firmware developerMachine integratorNetwork diagnostics specialistEtherCAT device designer
Admissions & scholarships

Requirements

  • A university degree in engineering, science or architecture, or equivalent demonstrable professional experience.
  • An internet connection and a computer capable of running the programme software.
  • English sufficient to read technical standards.

Ready to start?

Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.

FAQ

Frequently asked questions

The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.

You work with Beckhoff TwinCAT 3, CODESYS, SOEM, Wireshark and EtherCAT Conformance Test Tool, using free, academic or evaluation versions. Your tutor indicates the free alternative wherever one exists.

A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.

Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.

A university degree in engineering, science or architecture (or equivalent professional experience), a computer able to run the programme software, and English sufficient to read technical standards.

Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.

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