Master’s in Automotive RTOS and Hypervisors
Online master's programme of 1,900 hours in automotive RTOS and hypervisors. 12 modules covering real-time analysis, AUTOSAR Classic and Adaptive, embedded hypervisors, partitioning, secure boot, WCET and ISO 26262-6, with an assigned technical tutor.
Take the controls.
Run a real engineering trade-off from this field. Move the sliders, watch the model react in real time and beat the challenge.
What you will be able to do
Explain the real-time requirements of automotive software.
Calculate response times and worst-case execution times.
Configure AUTOSAR Classic and OSEK operating systems.
Compare AUTOSAR Adaptive and POSIX environments for high-performance computing.
Design partitions with embedded hypervisors that guarantee freedom from interference.
Implement secure boot and update mechanisms.
Integrate several vehicle domains on a virtualised platform.
Who it's for
- Automotive embedded software engineers.
- Virtualised platform architects.
- Real-time operating system engineers.
- AUTOSAR integration engineers.
- Timing analysis specialists.
- Functional safety software engineers moving into platform software.
- Engineering or science graduates seeking to enter vehicle manufacturers.
What you'll work with
- ISO 26262-6 (software for functional safety)
- AUTOSAR Classic Platform (layered ECU software architecture)
- ISO 17356 (OSEK/VDX)
- AUTOSAR Adaptive Platform (service-oriented architecture for high-performance computers)
- IEEE 1003.1 (POSIX)
- MISRA C:2012 (C coding guidelines for critical systems)
- Automotive SPICE (software process assessment)
- Lauterbach TRACE32
- Vector DaVinci Configurator
- QNX Momentics
- Xen Project
- AbsInt aiT
12 modules
1.1Hard and soft requirements in the vehicle ECU1.2Latency, jitter and determinism1.3Periodic and sporadic task models1.4Interrupts and their timing cost1.5Critical sections and blocking1.6Priority inversion and ceiling protocols1.7Fixed and dynamic priority schedulers1.8Utilisation-based schedulability analysis1.9Bench measurement tools1.10Workshop: timing characterisation of an ECU
2.1Worst-case response time2.2Iterative calculation and convergence conditions2.3Effect of interference from higher-priority tasks2.4Offsets, release jitter and queues2.5End-to-end event chains2.6Buses and their contribution to delay2.7Operating system overhead2.8Design margins and CPU reserve2.9Validation with real traces2.10Case study: sensor-actuator chain
3.1Layered architecture of AUTOSAR Classic3.2OSEK/VDX OS: tasks, events and alarms3.3Scheduling schemes and schedule tables3.4RTE and communication between components3.5BSW: system, memory and communication services3.6Configuration via ARXML3.7Timing monitoring with WdgM and TimeE3.8Memory protection on the MCU3.9Generation and build flow3.10Lab: integration of an SWC
4.1Service-oriented execution model4.2ara::com and service discovery4.3Execution management and machine states4.4POSIX PSE51 and real-time constraints4.5Scheduling in Linux: SCHED_FIFO and SCHED_DEADLINE4.6PREEMPT_RT and its limits4.7Containers and resource isolation4.8Updating adaptive applications4.9Classic-Adaptive interoperability4.10Lab: adaptive service with deadlines
5.1Full virtualisation, paravirtualisation and containers5.2Type 1 hypervisors in automotive5.3Virtualisation extensions in ARMv8-A5.4Static CPU and memory allocation5.5Peripheral pass-through and SR-IOV5.6GPU and accelerator virtualisation5.7Guest boot and boot order5.8Latency cost of virtualisation5.9Comparison of market solutions5.10Lab: deployment of two guests
6.1The concept of freedom from interference6.2Spatial partitioning using MMU and MPU6.3Temporal partitioning and CPU budgets6.4Memory bandwidth control6.5Contention in shared caches and buses6.6Runtime resource monitoring6.7Covert channels and their mitigation6.8Partitioning evidence for certification6.9Stress and saturation testing6.10Workshop: measuring interference between partitions
7.1Chain of trust from boot7.2Measured boot and storage of measurements7.3Image signing and key management7.4A/B updates and safe rollback7.5OTA updates: campaigns and dependencies7.6Updating the hypervisor versus the guests7.7Runtime integrity and periodic checks7.8Version management and software bill of materials7.9Applicable UNECE R156 requirements7.10Lab: complete update cycle
8.1Shared memory and message queues8.2Virtio and paravirtualised drivers8.3Virtualised buses: CAN, LIN and Ethernet8.4SOME/IP between domains8.5TSN Ethernet switching in the vehicle8.6Priorities, shaping and bandwidth reservation8.7End-to-end latency between guests8.8Fault isolation in communication8.9Diagnostics and distributed tracing8.10Lab: deterministic channel between domains
9.1The safety element out of context concept9.2Safety requirements allocated to the hypervisor9.3ASIL decomposition and dependencies9.4Dependent failure analysis9.5Safety argument for partitioning9.6Verification by analysis and by testing9.7Structural coverage required by ASIL9.8Tool management and qualification9.9Safety case documentation9.10Workshop: writing a partitioning argument
10.1Software versus hardware instrumentation10.2ETM and ITM traces and debug probes10.3WCET measurement: measurement-based, static and hybrid analysis10.4Cache and branch prediction effects10.5Representativeness of test scenarios10.6Identification of peaks and outliers10.7Trace visualisation and chain analysis10.8Automating measurement in continuous integration10.9Timing acceptance criteria10.10Lab: WCET measurement campaign
11.1Domain and zonal computer architecture11.2Coexistence of cockpit, ADAS and gateway11.3Mixed-criticality requirements11.4Power management and sleep states11.5Fast start-up of critical functions11.6Screen and audio sharing11.7Unified diagnostics and UDS over IP11.8Log and telemetry management11.9Integration testing on the bench and in the vehicle11.10Case study: integration of three domains
12.1Definition of requirements and timing constraints12.2Choice of hypervisor and justification12.3Partitioning design and budgets12.4Implementation of communication between guests12.5Integration of a function with safety requirements12.6Measurement campaign and analysis of results12.7Evidence for the safety case12.8Update and cybersecurity plan12.9Technical report and defence12.10Master's Thesis: final review with the tutor
How you'll learn
A 100% online programme on the SEIUM campus, with downloadable materials, recorded classes and an assigned technical tutor. There are no fixed timetables: you progress at your own pace within each intake, so it fits around your job.
Each module combines theory, guided reading of the original standard and applied exercises. The working software is Lauterbach TRACE32, Vector DaVinci Configurator, QNX Momentics, Xen Project and AbsInt aiT, in free, academic or evaluation versions. Testing is studied through real procedures for response-time and WCET analysis, integration on evaluation boards and freedom-from-interference testing. Assessment is continuous by module, plus the final Master's Thesis.
Standards covered: ISO 26262-6, AUTOSAR Classic Platform, ISO 17356 (OSEK/VDX), AUTOSAR Adaptive Platform, IEEE 1003.1 (POSIX), MISRA C:2012 and Automotive SPICE.
Build it end to end
Your final project follows the real engineering workflow, step by step, reviewed by your tutor.
Where this takes you
Requirements
- University degree in engineering, science or architecture, or equivalent demonstrable professional experience.
- Internet connection and a computer capable of running the programme's software.
- English sufficient to read technical standards.
Ready to start?
Send your application today. Our admissions team replies within 72 hours with your study plan and funding options.
Frequently asked questions
The programme totals 1,900 hours over 12–14 months. You set your own pace within each intake, and your tutor helps you plan the workload around your job.
You will work with Lauterbach TRACE32, Vector DaVinci Configurator, QNX Momentics, Xen Project and AbsInt aiT. Free, academic or evaluation versions are used, and your tutor indicates the free alternative where one exists.
A SEIUM Institute diploma, awarded on passing the continuous assessment and the Master's Thesis. It is SEIUM's own qualification, not an official state degree; its recognition depends on the programme completed and the regulations of each country.
Yes. Modules passed in a course or postgraduate diploma in the same area are recognised in the higher programme. Ask about the recognition policy when you enrol.
A university degree in engineering, science or architecture, or equivalent professional experience; a computer able to run the programme's software; and English sufficient to read technical standards.
Start dates are set by SEIUM's faculty for each intake. Our admissions team will confirm the next available date when you apply.
Related programmes
Master’s in C-V2X / ITS-G5 and Cooperative Perception Engineering
Online master's programme of 1,900 hours in C-V2X / ITS-G5 and cooperative perception engineering, structured in 12 modules covering C-ITS, ITS-G5 and C-V2X technologies, messages and…
Master’s in SDV Platforms & Middleware Engineering
Online master's programme of 1,900 hours in SDV platform and middleware engineering, structured in 12 modules covering E/E architectures, service-oriented middleware, AUTOSAR Classic and Adaptive, operating…
Master’s in Robust Perception in Adverse Conditions Engineering
Online master's programme of 1,900 hours in robust perception engineering for adverse conditions. 12 modules covering adverse conditions and ODD, the physics of sensor degradation, cameras,…
More in Autonomous, ADAS & Software-Defined Vehicle
All Autonomous, ADAS & Software-Defined Vehicle programmes → · How to apply · Fees & financing · Scholarships